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Compiler for Multicore Systems
Barteček, Jakub ; Přikryl, Zdeněk (referee) ; Masařík, Karel (advisor)
This bachelor´s thesis deals with parallel processing programs at the platform EdkDSP. The most important parts of this thesis are an analyzation of the target platform and a design of the translator. The design is aimed at translation of the OpenMP pragmas to a multithreaded code and a transformation of the specific types of cycles. The translator was implemented using the framework ROSE compiler and than tested.
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Mobile Client for Photograph Publication
Paulíček, Ondřej ; Přikryl, Zdeněk (referee) ; Burget, Radek (advisor)
The aim of this work is to create an application on Windows Mobile 6 platform for photo publication on the internet. Photos will be associated with geographic information. User will be able to attach geographic information to the photograph with use of connected GPS device and subsequently send these photographs to online publication system directly from mobile device.
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Static Analysis of CodAL Language Source Code
Fajčík, Martin ; Přikryl, Zdeněk (referee) ; Hynek, Jiří (advisor)
The goal of bachelor's thesis is to design and implement extensions devoted to source code static analysis and automatic corrections used in CodAL language editors. This form of analysis is convenient e.g. for the source code semantic checks. The thesis consists of theoretical and practical part. Role of the theoretical part is to overview with extension development related to Eclipse platform, especially with the CodAL language editor, CodAL language itself and to define problems of this language which are suitable to be solved on the static analysis level. Practical part includes specific implementation details of the particular static analysis elements and automatic corrections. These extended CodAL language editors are available in integrated development environment Codasip Studio based first and foremost on the Eclipse platform and project CDT. Codasip Studio has been developed by company Codasip Ltd. in collaboration with Lissom research team.
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Utilization of Linux Containers for HW/SW Co-Design
Juřica, Jiří ; Přikryl, Zdeněk (referee) ; Hruška, Tomáš (advisor)
In this bachelor thesis a way of replacement standard virtual machines by Linux containers is described. The goal is to create a~fully working system for performing parallel jobs with prepared environments for software build and test purposes. For containerization the Docker platform was chosen, which is used with automation tool for computers preparation. The system is also connected with continuous integration tool called Jenkins. This solution proves that usage of the Linux containers is more efficient than older virtualization technologies. The due time of each job was shortened about 24 % in average. The main benefits of this thesis is the comparison of two ways of virtualization and the introduction to the Docker technology.
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Automated Testing in FPGA
Valecký, David ; Přikryl, Zdeněk (referee) ; Hruška, Tomáš (advisor)
The aim of this work is to analyze the testing of processors developed by Codasip and find out which of the tests should be performed using FPGA devices. Furthermore, the goal is to design and implement a system for remote operation of FPGA devices connected to a central server in order to perform tests. The system is programmed in Python using the client-server architecture and Flask framework. The interaction of the server with the FPGA devices is ensured with the help of OpenOCD. The implemented system allows a~user to find out the status of connected FPGA circuits, configure these devices and then use them to run tests. The work uses FPGAs Artix-7 series made by Xilinx, placed on Digilent Nexys A7 development boards. The resulting testing of programmed chips in an FPGA representing a microprocessor is accelerated when using an FPGA device. Its results are faster on hardware representation than on its simulation in some cases.
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Advanced Techniques of C-to-HDL Tranformations
Michalik, Martin ; Křoustek, Jakub (referee) ; Přikryl, Zdeněk (advisor)
This thesis deals with proposal and implementation of advanced transformations used du- ring generation HDL from behavior description written in C language, which is part of architecture specification in CodAL language. These transformations focus either on the reduction of time required for execution, increasing frequency or area reduction of target hardware. This thesis discusses main problems of C to HDL transformation and describes principles and analysis of proposed transformations. Transformations results are discussed based on the visualisation of control data flow and register transfer level graphs, simulation of generated VHDL source files in the ModelSim software and synthesis of these source files for target FPGA Vertix 5 in the Xilinx ISE software.
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Interactive Disassembler
Mrva, Milan ; Přikryl, Zdeněk (referee) ; Křoustek, Jakub (advisor)
This thesis describes procedures and tools of reverse engineering in terms of software development. There are introduces different techniques of protection against decomposition of executables. The work also mentions some programs used for decomposition analysis. Furthermore it contains information about architecture of processing units, with emphasis on microprocessors Intel and Motorola. Variety of executable formats is shown. Generic retargetable disassembler was implemented. There is a description of its structure and plugins. These plugins represents three algorithms used for disassembling a program. One of them applies a multi-process parsing engine, which is an own design by author of the thesis. At the end, these techniques are compared and further development is outlined.
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Effective Memory Management for Multi-Threaded Applications
Vašíček, Libor ; Přikryl, Zdeněk (referee) ; Masařík, Karel (advisor)
This thesis describes design and implementation of effective memory management for multi-threaded applications. At first, the virtual memory possibilities are described, which can be found in the latest operating systems, such as Microsoft Windows and Linux. Afterwards the most frequently used algorithms for memory management are explained. Consequently, their features are used properly for a new memory manager. Final design includes particular tools for application debugging and profiling. At the end of the thesis a series of tests and evaluation of achieved results were done.
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Dynamic Reconfiguration of Hardware Accelerators
Brabec, Lukáš ; Přikryl, Zdeněk (referee) ; Masařík, Karel (advisor)
Thesis deals with usage of dynamic reconfiguration of FPGA in area of application specific instruction-set processors, considerng time-to-market, possibilities of acceleration and universality. Furthermore, it is designed an extension of application specific processor Codix with reconfigurable unit and it is described its implementation. Finally, the results are evaluated and opportunities for further development are identified.
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The Production Technology of unrotary part with flange
Přikryl, Zdeněk ; Hušek, Martin (referee) ; Císařová, Michaela (advisor)
Study describes application of forming technology for the production of unrotary parts with flange. The Study considers preliminary technology of forming processes in general. Further includes problems about drawing of unrotary parts with flange from singular to complex shaped. The next part of study includes evaluation of methods of the production belt gear shelter considering product criterias for series production and final accuracy and quality. Following part includes suggestion of the production technology of belt gear shelter using sheet metal forming. In the next parts of the study attends to accurate technological process elaboration of the components, to technological calculations and to project tool configuration. In conclusion the study includes technoeconomic evaluation of propřed technology production.
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