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Automated Design Methodology for Approximate Low Power Circuits
Mrázek, Vojtěch ; Bosio, Alberto (oponent) ; Fišer, Petr (oponent) ; Sekanina, Lukáš (vedoucí práce)
The rapid expansion of modern embedded and battery-powered systems has brought new challenges for design methods oriented to low power circuits and systems. Although these methods systematically apply various power optimization techniques, the overall power requirements are still growing because of the increased complexity of integrated circuits. It has been shown that many applications are inherently error resilient and this property can be exploited for further power consumption reduction. This principle is systematically investigated in the nascent field of approximate computing. This thesis deals with efficient design methods for approximate circuits. The proposed methods are based on evolutionary algorithms (EAs). Although EAs have been applied in logic synthesis and optimization of common as well as approximate circuits, their scalability is limited in these areas. The goal of this dissertation is to show that approximate logic synthesis based on evolutionary algorithms (particularly on genetic programming) can provide excellent tradeoffs between the error and power consumption of complex digital circuits. We analyzed four different applications that use digital circuits described at three different levels of abstraction. By means of Cartesian genetic programming we reduced power consumption of small transistor-level circuits that are typically used in a technology library. We combined evolutionary approximation with formal verification techniques in order to evolve high quality gate-level approximate circuits such as adders and multipliers and provide formal guarantees on the approximation error. These circuits were employed to reduce power consumption in neural image classifiers and discrete cosine transform blocks of the HEVC encoder. We proposed a new data-independent error metric - the distance error - and used it in the evolutionary approximation of complex median circuits that are suitable for low power signal processing. This doctoral thesis presents a coherent methodology for the design of approximate circuits at different levels of description which is also capable of providing formal guarantees on the approximation error.
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Multikriteriální kartézské genetické programování
Petrlík, Jiří ; Schwarz, Josef (oponent) ; Sekanina, Lukáš (vedoucí práce)
Cílem této diplomové práce je shrnout problematiku multikriteriálních genetických algoritmů a kartézského genetického programování. Podrobně je popsán algoritmus NSGAII a začlenění multikriteriální optimalizace do kartézského genetického programování (CGP). Navržená metoda multikriteriálního CGP byla ověřena na zvolených problémech z oblasti návrhu číslicových obvodů.
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Polymorphic circuits synthesis and optimization
Crha, Adam ; Plíva, Zdeněk (oponent) ; Fišer, Petr (oponent) ; Růžička, Richard (vedoucí práce)
This thesis deals with synthesis and optimization methods of polymorphic circuits. Ordinary and multi-functional synthesis and optimization methods are discussed. The main objective of this thesis is to introduce novel methodologies for scalable synthesis of multi-functional digital circuits. Despite the fact that several approaches have been proposed during recent years, those are applicable for small-scale circuits only or are based on various evolution-inspired techniques. Obviously, scalable synthesis methodology for complex multi-functional circuits does not exist yet. The proposed methodology is based on And-Inverter Graphs ( AIGs ) with built-in extension for multi-functional circuits where the employment of rewriting techniques reduces the area by sharing common resources of two different input circuits. Experiments performed on publicly available benchmark circuits demonstrate significant optimization achievements.
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Polymorphic circuits synthesis and optimization
Crha, Adam ; Plíva, Zdeněk (oponent) ; Fišer, Petr (oponent) ; Růžička, Richard (vedoucí práce)
This thesis deals with synthesis and optimization methods of polymorphic circuits. Ordinary and multi-functional synthesis and optimization methods are discussed. The main objective of this thesis is to introduce novel methodologies for scalable synthesis of multi-functional digital circuits. Despite the fact that several approaches have been proposed during recent years, those are applicable for small-scale circuits only or are based on various evolution-inspired techniques. Obviously, scalable synthesis methodology for complex multi-functional circuits does not exist yet. The proposed methodology is based on And-Inverter Graphs ( AIGs ) with built-in extension for multi-functional circuits where the employment of rewriting techniques reduces the area by sharing common resources of two different input circuits. Experiments performed on publicly available benchmark circuits demonstrate significant optimization achievements.
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Automated Design Methodology for Approximate Low Power Circuits
Mrázek, Vojtěch ; Bosio, Alberto (oponent) ; Fišer, Petr (oponent) ; Sekanina, Lukáš (vedoucí práce)
The rapid expansion of modern embedded and battery-powered systems has brought new challenges for design methods oriented to low power circuits and systems. Although these methods systematically apply various power optimization techniques, the overall power requirements are still growing because of the increased complexity of integrated circuits. It has been shown that many applications are inherently error resilient and this property can be exploited for further power consumption reduction. This principle is systematically investigated in the nascent field of approximate computing. This thesis deals with efficient design methods for approximate circuits. The proposed methods are based on evolutionary algorithms (EAs). Although EAs have been applied in logic synthesis and optimization of common as well as approximate circuits, their scalability is limited in these areas. The goal of this dissertation is to show that approximate logic synthesis based on evolutionary algorithms (particularly on genetic programming) can provide excellent tradeoffs between the error and power consumption of complex digital circuits. We analyzed four different applications that use digital circuits described at three different levels of abstraction. By means of Cartesian genetic programming we reduced power consumption of small transistor-level circuits that are typically used in a technology library. We combined evolutionary approximation with formal verification techniques in order to evolve high quality gate-level approximate circuits such as adders and multipliers and provide formal guarantees on the approximation error. These circuits were employed to reduce power consumption in neural image classifiers and discrete cosine transform blocks of the HEVC encoder. We proposed a new data-independent error metric - the distance error - and used it in the evolutionary approximation of complex median circuits that are suitable for low power signal processing. This doctoral thesis presents a coherent methodology for the design of approximate circuits at different levels of description which is also capable of providing formal guarantees on the approximation error.
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|
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Multikriteriální kartézské genetické programování
Petrlík, Jiří ; Schwarz, Josef (oponent) ; Sekanina, Lukáš (vedoucí práce)
Cílem této diplomové práce je shrnout problematiku multikriteriálních genetických algoritmů a kartézského genetického programování. Podrobně je popsán algoritmus NSGAII a začlenění multikriteriální optimalizace do kartézského genetického programování (CGP). Navržená metoda multikriteriálního CGP byla ověřena na zvolených problémech z oblasti návrhu číslicových obvodů.
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