National Repository of Grey Literature 14 records found  previous11 - 14  jump to record: Search took 0.01 seconds. 
DMA Controller with Generic Number of Communication Channels
Špinler, Martin ; Kořenek, Jan (referee) ; Martínek, Tomáš (advisor)
Work has been developing hardware unit that implements DMA transfers between peripherals and RAM. Unit is being developed on the platform NetCOPE created for Combo cards with programmable gate array. Even if the card is primarily intended for acceleration of processing network traffic, the unit can be used universally.
Volume Rendering Using Programmable HW
Jošth, Radovan ; Kršek, Přemysl (referee) ; Herout, Adam (advisor)
This work describes and implementing method for volume data rendering. Main purpose of this work is visualization of scanned 3D data with some current method used for the 3D volumetric scanning. The 3D volumetric scanning is mainly used in medicine and chemistry. System is using programmable pipeline of current graphic cards, which provides us fast parallel work with large volumetric data. This paper introduces some basics about the volumetric rendering and scanning, describes design and at the end, the implementation steps. Result of this project is application which renders volumetric data with OpenGL.
Raster Image Processing Using FPGA
Musil, Petr ; Kadlček, Filip (referee) ; Zemčík, Pavel (advisor)
This thesis describes the design and implementation of hardware unit to detect objects in the image. Design of unit is optimized for fast streaming processing. Object detection is performed by the trained classifiers using local image features. It describes a new technique for multi-scale detection. Detector used accelerating algorithm based on neighboring positions. The correct functionality of the detector is verified by simulation and part of a whole is implemented on development kit.
Fast Regular Expression Matching Using FPGA
Kaštil, Jan ; Martínek, Tomáš (referee) ; Kořenek, Jan (advisor)
The thesis explains several algorithms for pattern matching. Algorithms work in both software and hardware. A part of the thesis is dedicated to extensions of finite automatons. The second part explains hashing and introduces concept of perfect hashing and CRC. The thesis also includes a suggestion of possible structure of a pattern matching unit based on deterministic finite automatons in FPGA. Experiments for determining the structure and size of resulting automatons were done in this thesis.

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