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Design of a comparator with offset compensation in CMOS technology
Hylský, Josef ; Vávra, Jiří (referee) ; Kledrowetz, Vilém (advisor)
This work contains basic knowledge about comparators and its design in the CMOS technology. The first chapter deals with a wide use of a comparator, its charakteristice and the CMOS technology that is used to produce the transistors for the implementation of comparators. In the two following chapters there are examples of connexion of comparators, the design of the two-stage open loop comparator and improving of its charakteristic. The preamplifier and its application in high-speed Latchs comparators are introduced in the next chapter. The design of the comparator are introduced inthe next chapter. The design of the comparator and its application in high-speed comparators are introduced in the next chapter.
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Membraneless speaker
Kovář, Josef ; Šteffan, Pavel (referee) ; Pavlík, Michal (advisor)
The bachelor thesis consists of theoretic basics and describes the design and construction of one-channel membraneless speaker. Absence of mechanical components gives the membraneless speaker no frequency limitation. The design consists of power source, control electronics, which modulates the signal, convertor and output transformer. The power source is realized by transformer, which lowers the voltage and stabilizators. Modulation is provided by integrated circuit TL 594, its duty is adjusted by potentiometer P1 and frequency by potentiometer P2. Power conversion provides dual forward converter. As a output transformer was used transformer from color television.
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Revolution counter of high-speed motors
Biječek, Vilém ; Tomíček, Pavel (referee) ; Skácel, Josef (advisor)
This bachelor thesis deals with two issues. Several methods have been explored to measure rotational speed. Primarily the speed of the high-speed shafts. Based on this, it was found that the most suitable method for this experiment is the optical method. The second focus of this work was design and development of the device. A large part is devoted to the selection and application of components, and simulations of circuit connections, which have been successfully tested and implemented. The output is an accurately measured value shown on the display. It also included the design of printed circuit boards, one for analogue information processing and the other for placing the microcontroller with the display.
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Design of the latched comparator and its comparison with an opamp like comparator
Mrázek, Petr ; Kledrowetz, Vilém (referee) ; Prokop, Roman (advisor)
The main content of this work is the design of four basic topologies of latched comparators and opamp like comparator. The introductory part of the bachelor thesis deals with the description, comparison and principles of operation of comparators such as opamp like comparator and latched comparators. In the practical part of this work is firstly performed the design of all the mentioned topologies of switched comparators and comparator of the operational amplifier type. Subsequently, they are compared with each other mainly in terms of their speed, accuracy, amount of kickback noise and consumption. At the end of the practical part, the design of these four basic topologies of switched comparators have been performed again, but already with the techniques for reduction of kickback noise applied to them. The whole work is concluded by the evaluation of individual acquired knowledge.
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Applied use of DSP blocks in Intel FPGA
Kondys, Daniel ; Pokorný, Jiří (referee) ; Smékal, David (advisor)
This bachelor's thesis explores the utilization of DSP blocks located particularly on FPGA Stratix 10 DX 2800 for the implementation of a counter and a comparator. In the theoretical part, topics such as the protocol Ethernet, the FPGA technology and its relation with Network Interface Controllers are explained, followed by a~description of general design flow for digital circuits on FPGAs and a detailed insight on DSP blocks in the Virtex UltraScale+ XCVU7P and Stratix 10 DX 2800 FPGAs. The practical part focuses on the design, implementation and testing of the counter and comparator, followed by measurements of their impact on FPGA's resource utilization and maximum frequency. Lastly, it describes the integration of these components into modules that are part of the COMBO-400g1 Network Interface Connector firmware and analyzes their impact on FPGA's resource utilization and maximum frequency.
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Adaptation of digital predistorter to linearize amplifiers using comparator
Jagla, Lukáš ; Ayöz, Suat (referee) ; Götthans, Tomáš (advisor)
Diplomová práce pojednává o návrhu nového hardwaru využívající komparátor ve zpětné vazbě systému pro digitální předzkreslování signálu. Vybrané vlastnosti navrhované architektury jsou ověřeny pomocí simulací a následně jsou zvoleny komponenty vhodné pro vysokofrekvenční použití za účelem implementace. Na bázi předložené architektury je navržen akviziční modul včetně obvodové realizace a vytvoření plošného spoje. Zhotovený plošný spoj je osazen a připraven pro další testování. Dále je navržen příslušný firmware pro příjem a vysílání signálu a získávání naměřených dat. Obdržené výsledky jsou určeny pro zhodnocení vlastností hardwaru a budoucího využití architektury v systémech digitálních předzkreslovačů.
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