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Photos with Timestamp
Mlejnek, Matěj ; Herout, Adam (referee) ; Zemčík, Pavel (advisor)
This thesis describes the design and implementation of a system for creating timestamps for photos in groups. It deals with the ways the group timestamp of multiple photos can be verified all at once. The whole system can be split into four parts. The first part is a mobile application, in which photos are taken by the user. The second part is the server on which photos are backed up and which relays the photos to a server that makes group timestamps. The third part is the server itself that creates the timestamps. The fourth part consists of user tools for retrospectively checking the existence of a valid group timestamp.
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Compact description of directory trees
Končický, Václav ; Mareš, Martin (advisor) ; Majerech, Vladan (referee)
There exist many copies of data stored as directory trees whose consistency we need to verify. In this work we create a new binary format describing directory trees. It allows to record names, hashed contents, and other metadata of the files. In order to verify data consistency, we can compare two such descriptions. This format is designed with focus on its compactness and high read speed. We present a program which builds such description for a given tree and compares two descriptions. In order to maximize speed we use parallelization techniques and tree hashing, taking properties of hard disk drives into account. 1
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Implementation of Bloom Filters in FPGA
Matoušek, Denis ; Kaštil, Jan (referee) ; Žádník, Martin (advisor)
The thesis deals with probabilistic data structure Bloom filter and its modifications - counting Bloom filter and multistage filter. The fundamentals of these data structures are explained and the mathematical equations describing their properties including the equation to minimize the false positive rate are shown. Appropriate hash function is chosen considering an implementation on a FPGA chip. Designs of architectures of the hash function and data structures are implemented in VHDL language and their synthesis is done. Its results are discussed considering occupied resources of a FPGA chip, a critical path and maximum frequency.
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Hardware Acceleration of Cipher Attack
Okuliar, Adam ; Slaný, Karel (referee) ; Vašíček, Zdeněk (advisor)
Hardware acceleration is often good tool to achieve significantly better performance of processing great ammount of data or of realization of parallel algoritms. Aim of this work is to demonstrate resoluts of using FPGA circuits for implementation exponentially complex algorithm. As example haschosen brute-force attack on WEP cryptographic algorithm with 40-bit long key. Goal of this work is to compare properties and performance of software and hardware implementation of choosen algorithm.
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Face Identification
Částek, Petr ; Jaša, Petr (referee) ; Chmelař, Petr (advisor)
This document is trying to introduce the reader with issues of identifying the face connected with miscellaneous scanning technologies and enviroments. Inside this document there are mentioned some possibilities of creation unique print of a face so that there would be denied unwanted effects of enviroment and the identification of persons would be possible.
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Searching algorithms
Ďuriš, Martin ; Šeda, Miloš (referee) ; Dvořák, Jiří (advisor)
The thesis describes and analyzes selected searching algorithms for single dimensional array. Algorithms are analyzed mathematically and graphically. Mathematical analysis is based on analysis of average amount of performed comparisons required for the final result and literature review. Graphical analysis is based on multiple examinations of selected searching methods with randomly generated single dimensional arrays. The graphs show dependency of elapsed searching time of successful and unsuccessful searching trial on the size of single dimensional array. The results establish the binary searching algorithm as the fastest one of the selected searching algorithms.
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