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Digital Predistorters with Low-Complexity Adaptation
Král, Jan ; Springer, Andreas (oponent) ; Roblin, Patrick (oponent) ; Götthans, Tomáš (vedoucí práce)
Modern communication systems often require digital predistorters (DPDs), advanced signal-processing units, to satisfy stringent demands on transmitter linearity and efficiency. Nevertheless, DPD significantly increases the hardware and computational complexity of transmitters, which leads to increased power consumption and expenses. Therefore, we propose methods to achieve lower hardware and computational complexity of DPD adaptation. The principle of real-valued feedback samples allows for saving one of two originally-needed feedback analogue-to-digital converters (ADCs), which implies reduced transmitter complexity and power consumption. Furthermore, the hardware and computational complexity can be reduced if the feedback samples for the DPD adaptation are undersampled and carefully selected. The proposed techniques select samples based on histograms and can reduce the required number of feedback samples to a few tens. The provided analyses show approximately 400-times reduced computational complexity achieved by the sample selection and 40-times reduced power consumption of the undersampling feedback ADCs. The real-valued feedback, its undersampling, and sample selection constitute fundamental principles of the proposed DPD adaptation with a level-crossing ADC, which is realised by a simple comparator. Replacing the conventional ADCs with a comparator significantly reduces the design complexity and power consumption. All the proposed and described techniques are accompanied by simulations, usually confirmed by measurements on real hardware, and compared with state-of-the-art methods. The final discussion analyses the limitations, usability and advantages of the proposed techniques. It shows that reducing complexity might not be universally applicable and all the design constraints and specifications must be carefully assessed.
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Digital Predistorters with Low-Complexity Adaptation
Král, Jan ; Springer, Andreas (oponent) ; Roblin, Patrick (oponent) ; Götthans, Tomáš (vedoucí práce)
Modern communication systems often require digital predistorters (DPDs), advanced signal-processing units, to satisfy stringent demands on transmitter linearity and efficiency. Nevertheless, DPD significantly increases the hardware and computational complexity of transmitters, which leads to increased power consumption and expenses. Therefore, we propose methods to achieve lower hardware and computational complexity of DPD adaptation. The principle of real-valued feedback samples allows for saving one of two originally-needed feedback analogue-to-digital converters (ADCs), which implies reduced transmitter complexity and power consumption. Furthermore, the hardware and computational complexity can be reduced if the feedback samples for the DPD adaptation are undersampled and carefully selected. The proposed techniques select samples based on histograms and can reduce the required number of feedback samples to a few tens. The provided analyses show approximately 400-times reduced computational complexity achieved by the sample selection and 40-times reduced power consumption of the undersampling feedback ADCs. The real-valued feedback, its undersampling, and sample selection constitute fundamental principles of the proposed DPD adaptation with a level-crossing ADC, which is realised by a simple comparator. Replacing the conventional ADCs with a comparator significantly reduces the design complexity and power consumption. All the proposed and described techniques are accompanied by simulations, usually confirmed by measurements on real hardware, and compared with state-of-the-art methods. The final discussion analyses the limitations, usability and advantages of the proposed techniques. It shows that reducing complexity might not be universally applicable and all the design constraints and specifications must be carefully assessed.
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