National Repository of Grey Literature 11 records found  1 - 10next  jump to record: Search took 0.00 seconds. 
Tools for Automatic Creation of Presentations
Uherčík, Maroš ; Minařík, Miloš (referee) ; Kadlček, Filip (advisor)
This bachelor thesis deals with design and implementation of tool for automatic presentation creation in OOXML format. Work contains theoretic analysis of the OOXML format, focusing on presentation, analysis and design of tool and implementation description. Practical part of this work is implementation of designed tool. The final part shows obtained results, demonstration of tool usage and proposal of future works.
Hardware Acceleration Using Functional Languages
Hodaňová, Andrea ; Kadlček, Filip (referee) ; Fučík, Otto (advisor)
The aim of this thesis is to research how the functional paradigm can be used for hardware acceleration with an emphasis on data-parallel tasks. The level of abstraction of the traditional hardware description languages, such as VHDL or Verilog, is becoming to low. High-level languages from the domains of software development and modeling, such as C/C++, SystemC or MATLAB, are experiencing a boom for hardware description on the algorithmic or behavioral level. Functional Languages are not so commonly used, but they outperform imperative languages in verification, the ability to capture inherent paralellism and the compactness of code. Data-parallel task are often accelerated on FPGAs, GPUs and multicore processors. In this thesis, we use a library for general-purpose GPU programs called Accelerate and extend it to produce VHDL. Accelerate is a domain-specific language embedded into Haskell with a backend for the NVIDIA CUDA platform. We use the language and its frontend, and create a new backend for high-level synthesis of circuits in VHDL.
Raster Image Processing Using FPGA
Musil, Petr ; Kadlček, Filip (referee) ; Zemčík, Pavel (advisor)
This thesis describes the design and implementation of hardware unit to detect objects in the image. Design of unit is optimized for fast streaming processing. Object detection is performed by the trained classifiers using local image features. It describes a new technique for multi-scale detection. Detector used accelerating algorithm based on neighboring positions. The correct functionality of the detector is verified by simulation and part of a whole is implemented on development kit.
Parallel Text Alignment
Kadlček, Filip ; Grézl, František (referee) ; Smrž, Pavel (advisor)
This thesis is concerned to align parallel corpus. In the first part of thesis are describe acceses to align and some tool to align. As first describe a statistical align, but the main part is specialize to align with use dictionary, which is the main part of this thesis. In the midle part is introduce the princip of dictionary align and a simple example of align. At the end of work are sumarize obtained results and are noted proposals for future develop.
Raster Image Data Transfers in FPGA
Musil, Martin ; Kadlček, Filip (referee) ; Zemčík, Pavel (advisor)
This work deals with the design and implementation of high-speed communication interfaces into FPGA chip and their utilizing for image transmission and processing. In the implementation part has been created PCI Express endpoint device, which provides data transfers between the FPGA chip and computer RAM memory. As a source of image data for further processing was connected the Unicam M621 camera throught the Ethernet interface to FPGA chip. The project was implemented on the Xilinx SP605 development board. Using both of the the interfaces were demonstrated on the application of edge detection using Sobel operator. The PCI Express endpoint device driver for the Linux operating system and a simple application interface in C language was also created within this project.
Parallel Text Alignment
Kadlček, Filip ; Grézl, František (referee) ; Smrž, Pavel (advisor)
This thesis is concerned to align parallel corpus. In the first part of thesis are describe acceses to align and some tool to align. As first describe a statistical align, but the main part is specialize to align with use dictionary, which is the main part of this thesis. In the midle part is introduce the princip of dictionary align and a simple example of align. At the end of work are sumarize obtained results and are noted proposals for future develop.
Tools for Automatic Creation of Presentations
Uherčík, Maroš ; Minařík, Miloš (referee) ; Kadlček, Filip (advisor)
This bachelor thesis deals with design and implementation of tool for automatic presentation creation in OOXML format. Work contains theoretic analysis of the OOXML format, focusing on presentation, analysis and design of tool and implementation description. Practical part of this work is implementation of designed tool. The final part shows obtained results, demonstration of tool usage and proposal of future works.
Implementation of Image Classifiers in FPGAs
Kadlček, Filip ; Puš, Viktor (referee) ; Fučík, Otto (advisor)
The thesis deals with image classifiers and their implementation using FPGA technology. There are discussed weak and strong classifiers in the work. As an example of strong classifiers, the AdaBoost algorithm is described. In the case of weak classifiers, basic types of feature classifiers are shown, including Haar and Gabor wavelets. The rest of work is primarily focused on LBP, LRP and LR classifiers, which are well suitable for efficient implementation in FPGAs. With these classifiers is designed pseudo-parallel architecture. Process of classifications is divided on software and hardware parts. The thesis deals with hardware part of classifications. The designed classifier is very fast and produces results of classification every clock cycle.
Raster Image Data Transfers in FPGA
Musil, Martin ; Kadlček, Filip (referee) ; Zemčík, Pavel (advisor)
This work deals with the design and implementation of high-speed communication interfaces into FPGA chip and their utilizing for image transmission and processing. In the implementation part has been created PCI Express endpoint device, which provides data transfers between the FPGA chip and computer RAM memory. As a source of image data for further processing was connected the Unicam M621 camera throught the Ethernet interface to FPGA chip. The project was implemented on the Xilinx SP605 development board. Using both of the the interfaces were demonstrated on the application of edge detection using Sobel operator. The PCI Express endpoint device driver for the Linux operating system and a simple application interface in C language was also created within this project.
Raster Image Processing Using FPGA
Musil, Petr ; Kadlček, Filip (referee) ; Zemčík, Pavel (advisor)
This thesis describes the design and implementation of hardware unit to detect objects in the image. Design of unit is optimized for fast streaming processing. Object detection is performed by the trained classifiers using local image features. It describes a new technique for multi-scale detection. Detector used accelerating algorithm based on neighboring positions. The correct functionality of the detector is verified by simulation and part of a whole is implemented on development kit.

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4 Kadlček, František
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