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A Mini-Cluster Based on Microcontroller Computing Nodes
Šídlo, Boleslav ; Mrázek, Vojtěch (referee) ; Bidlo, Michal (advisor)
The objective of this bachelor thesis is to investigate a low-cost computing cluster, composed of microcontrollers-based nodes, for parallel computing tasks. The work deals with the behaviour and limitations of the platform in various situations. Experiments were performed using 4 development boards equipped with 8-bit microcontrollers. I2C seriál interface was used for the communication between the nodes. The experiments were devoted to the comparison of computing times of a sequential algorithm (running on a single minrocontroller only) and the parallel version using the cluster. The results showed that the cluster can speed-up the computation of applications that does not require a high communication overhead. Moreover, the microcontrollers applied showed as unsuitable for floating-point computing if a high accuracy of the results is required.
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Neural Networks Classifier Design using Genetic Algorithm
Tomášek, Michal ; Vašíček, Zdeněk (referee) ; Mrázek, Vojtěch (advisor)
The aim of this work is the genetic design of neural networks, which are able to classify within various classification tasks. In order to create these neural networks, algorithm called NeuroEvolution of Augmenting Topologies (also known as NEAT) is used. Also the idea of preprocessing, which is included in implemented result, is proposed. The goal of preprocessing is to reduce the computational requirements for processing of benchmark datasets for classification accuracy. The result of this work is a set of experiments conducted over a data set for cancer cells detection and a database of handwritten digits MNIST. Classifiers generated for the cancer cells exhibits over 99 % accuracy and in experiment MNIST reduces computational requirements more than 10 % with bringing negligible error of size 0.17 %.
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Intelligent Energy Measurement Device
Mrázek, Vojtěch ; Sekanina, Lukáš (referee) ; Vašíček, Zdeněk (advisor)
The goal of this project is to design an energy measurement device that supports logging of historic values and offers simple analysis of the values. The proposed device enables to display actual quantities such as active and reactive power, current or even power factor. In addition to that, it also stores the energy profile that can be subsequently analysed. The device communicates locally via USB or remotely via Ethernet.
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Acceleration of Transistor-Level Evolutionary Design of Digital Circuits Using Zynq
Mrázek, Vojtěch ; Sekanina, Lukáš (referee) ; Vašíček, Zdeněk (advisor)
The goal of this project is to design a hardware unit that is designed to accelerate evolutionary design of digital circuits on transistor level. The project is divided to two parts. The first one describes design methods of the MOSFET circuits and issues of evolutionary algorithms. It also analyses current results in this domain and provides a new method for the design and optimization. The second part describes proposed unit that accelerates the new method on the circuit Zynq which integrates ARM processor and programmable logic. The new method functionality has been empirically analysed in the task of optimization of few circuits with more inputs. The hardware unit has been tested for designing of gates on transistor level.
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Wireless Communication in Fire Sport
Pelka, Tomáš ; Mrázek, Vojtěch (referee) ; Vašíček, Zdeněk (advisor)
This work describes the design of wireless timer for fire sport disciplines. Its aim is to replace long wires with wireless communication while preserving equal or better reliability. Important part is the need for clock synchronization between wireless modules. Related topic is selection of suitable synchronization algorithm and communication protocol. The proposed system was realized in form of prototype using Texas Instruments's development platform LaunchPad EXP 430 FR4133 and wireless modules with Texas Instruments's chip CC1101. Parameters of designed system (especially the accuracy of time synchronization and measurement) were verified in laboratory.
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Arithmetic Circuit Generator
Bolješik, Michal ; Mrázek, Vojtěch (referee) ; Vašíček, Zdeněk (advisor)
The goal of this thesis is to design and implement a tool that would be able to generate a description of various types of arithmetic circuits, such as adders and multipliers, that are involved in more complex systems (filters, transformations, etc.). The first part of the thesis deals with analysis of different types of adders and multipliers on either theoretical or practical level. In the second part there is a description of the design and implementation of the tool created in Python language. On base of parameters, the tool is able to generate hierarchical or flattened description of various circuits in formats aimed for visualization, simulation and validation. In the end, the tool is used to compare different designs of adders and multipliers.
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