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Creating Timetables Using Genetic Algorithms
Horký, Aleš ; Matoušek, Jiří (referee) ; Minařík, Miloš (advisor)
This bachelor thesis contains design and implementation of two-phase genetic algorithm intended for creating timetable schedules at primary schools. The algorithm is designed for maximum reduction of state space of solved problem without decrease of its universality. The implementated program in C++ language is applicable for creating timetable schedules at small and medium sized schools.
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Visualization of Longest Prefix Match Algorithms
Fomiczew, Jiří ; Matoušek, Jiří (referee) ; Kováčik, Michal (advisor)
This thesis describes the design and implementation of program for vizualization of algorithms for longest pre fix match (LPM), which is one of the most important tasks for packet classi cation and routing in TCP/IP networks. It describes necessary theory and details about selected algorithms - Trie, Tree Bitmap and CPE. Furthermore, it describes the design and implementation of program for vizualization of the search process of these algorithms with emphasis on the potential use for educational purposes. Finally, it describes the possibilities for future development and expansion of the program.
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Hardware Implementation of CRC for High Speed Networks
Belešová, Michaela ; Martínek, Tomáš (referee) ; Matoušek, Jiří (advisor)
This bachelor's thesis deals with a problem of hardware implementation of CRC for high speed networks. In the first section, there is a description of basic information about CRC and several methods for CRC calculation. From methods described in the first section methods representing Galois fields and methods describing connection of units computing CRC in parallel and in series were chosen. Based on these methods an implementation was created. This implementation expects 256b input words and achieves throughput over 40Gbps. This implementation also deals with a problem of unaligned starts and ends of frames and possible occurrence of pieces from two different frames in the same word. The whole solution was designed with minimal resource usage in mind.
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IPv6 Prefix Generator
Obrusník, Vojtěch ; Kučera, Jan (referee) ; Matoušek, Jiří (advisor)
Incoming deployment of IPv6 technology in larger scale requires existence of effective route lookup algorithms suitable of manipulation with long IPv6 prefixes. Development of such algorithms is dependent on an huge amount of test data sets, which do not exist at the moment. This paper is focused on design and implementation of a tool, that would be able to generate such test data sets. Study phase of IPv6 address allocation polices and analysis of currently available pieces of prefix sets took place before the implementation. Validation of results was performed by bit value and prefix length scatter measurement.
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Mapping of Match Tables from P4 Language to FPGA Technology
Kekely, Michal ; Matoušek, Jiří (referee) ; Kořenek, Jan (advisor)
This thesis deals with design and implementation of mapping of match action tables from P4 language to FPGA technology. Goal of the thesis was to describe key principles, which need to be understood in order to design such a mapping and function of algorithms needed, apply these principles by implementing them and analyze the speed and memory requirements of such an implementation. Outcome provides configurable hardware unit capable of classifying packets and connection between the unit and match action tables from P4 language. The implementation is based on DCFL algorithm and requires less memory compared to HiCuts and HyperCuts algorithms while being comparably fast at worst-case scenarios.
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Acceleration of LZ4 Compression Algorithm in FPGA
Marton, Dominik ; Martínek, Tomáš (referee) ; Matoušek, Jiří (advisor)
This project describes the implementation of an LZ4 compression algorithm in a C/C++-like language, that can be used to generate VHDL programs for FPGA integrated circuits embedded in accelerated network interface controllers (NICs). Based on the algorithm specification, software versions of LZ4 compressor and decompressor are implemented, which are then transformed into a synthesizable language, that is then used to generate fully functional VHDL code for both components. Execution time and compression ratio of all implementations are then compared. The project also serves as a demonstration of usability and influence of high-level synthesis and high-level approach to design and implementation of hardware applications known from common programming languages.
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Analysis of Parameters of Packet Classification Rule Sets
Sabo, Jozef ; Orsák, Michal (referee) ; Matoušek, Jiří (advisor)
A theme of bachelor's thesis is an analysis of rules used for packet classification in computer networks. A theoretical part of the thesis introduces packet classification and describes the role of classification rules. This part also presents the format of classification rules utilized in real tools. Based on these information, a tool able to analyze IP 5-tuple classification rules in any format was designed and implemented. Output of the implemented tool is a parameter file containing different statistics and probability distributions of examined rule sets. This parameter file can be used for generating synthetic rule sets using ClassBench and ClassBench-ng tools. The final part of the thesis examines parameter files created by the implemented tool from available real rule sets.
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Financing Projects from EU Funds
Procházková, Jana ; Matoušek, Jiří (referee) ; Heralecký, Tomáš (advisor)
Thesis addresses the issue of funding the European Union, notably through the State Agricultural Intervention Fund in Agrospol Hradek, spol. s r.o. The work builds on the current situation in society, the attention is focused on project financing irrigation pumping station on the water "Rajčatovna". In other parts of the work is submitted by a means of financing the project.
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Measurement of Backbone Routing Parameters
Celárek, Ondřej ; Kořenek, Jan (referee) ; Matoušek, Jiří (advisor)
This thesis deals with issue of routing between Autonomous Systems. For routing between autonomous systems is used Border Gateway Protocol (BGP). The routers in Autonomous Systems modify their routing tables based on BGP messages. Routing tables are used for forwarding information on Internet. Issue of this thesis is analysis of change routing tables for eventually optimizing of routing architecture. First part of thesis is focused on theory of routers, routing ang BGP. Second part of this thesis focuses on implementation and execution experiments with routing tables. In this part are also described reached results.
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Network Traffic Monitoring Using the P4 Language
Patová, Pavlína ; Matoušek, Jiří (referee) ; Martínek, Tomáš (advisor)
Today we often encounter the need to monitor network and service quality. For this purpose we can use for example INT. Our goal is to find the optimal platform and associated compiler for implementing INT. We will try to find an alternative to the existing solutions (T4P4S, BMv2). However, we will also mention these two platforms and discuss their advantages and disadvantages. The result of this work is an overview of the capabilities of each compiler and the performance of the described implementations.
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