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Acceleration of Transistor-Level Evolutionary Design of Digital Circuits Using Zynq
Mrázek, Vojtěch ; Sekanina, Lukáš (referee) ; Vašíček, Zdeněk (advisor)
The goal of this project is to design a hardware unit that is designed to accelerate evolutionary design of digital circuits on transistor level. The project is divided to two parts. The first one describes design methods of the MOSFET circuits and issues of evolutionary algorithms. It also analyses current results in this domain and provides a new method for the design and optimization. The second part describes proposed unit that accelerates the new method on the circuit Zynq which integrates ARM processor and programmable logic. The new method functionality has been empirically analysed in the task of optimization of few circuits with more inputs. The hardware unit has been tested for designing of gates on transistor level.
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Coevolutionary Algorithm for Test-Based Problems
Hulva, Jiří ; Sekanina, Lukáš (referee) ; Drahošová, Michaela (advisor)
This thesis deals with the usage of coevolution in the task of symbolic regression. Symbolic regression is used for obtaining mathematical formula which approximates the measured data. It can be executed by genetic programming - a method from the category of evolutionary algorithms that is inspired by natural evolutionary processes. Coevolution works with multiple evolutionary processes that are running simultaneously and influencing each other. This work deals with the design and implementation of the application which performs symbolic regression using coevolution on test-based problems. The test set was generated by a new method, which allows to adjust its size dynamically. Functionality of the application was verified on a set of five test tasks. The results were compared with a coevolution algorithm with a fixed-sized test set. In three cases the new method needed lesser number of generations to find a solution of a desired quality, however, in most cases more data-point evaluations were required.
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Polymorphic Self-Checking Circuits
Mazuch, Martin ; Růžička, Richard (referee) ; Sekanina, Lukáš (advisor)
This Master's thesis deals with question of the development of self-checking polymorphic circuits. It deals with a traditional way of creating reliable and self-checking circuits, presenting basic principles and methods. Also a method of Cartesian Genetic Programming for development of combinational circuits is explained. This thesis describes concepts of polymorphic gates and circuits and their benefits in practical use. Some existing self-checking polymorphic circuits are presented and their self-checking capabilities are analyzed. A proposal of realization of a design system for self-checking polymorphic circuits is given. A design system has been built based on presented specification and an application allowing simulations and analysis of system-proposed solutions has been created. Variety of experiments have been performed at created system and several interesting solutions have been acquired. At the end, conclusion is given and benefits of MSc. project are discussed.
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Crossover in Cartesian Genetic Programming
Vácha, Petr ; Vašíček, Zdeněk (referee) ; Sekanina, Lukáš (advisor)
Optimization of digital circuits still attracts much attention not only of researchers but mainly chip producers. One of new the methods for the optimization of digital circuits is cartesian genetic programming. This Master's thesis describes a new crossover operator and its implementation for cartesian genetic programming. Experimental evaluation was performed in the task of three-bit multiplier and five-bit parity circuit design.
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A Tool for Analysis of Digital Circuit Evolution Records
Kapusta, Vlastimil ; Bidlo, Michal (referee) ; Sekanina, Lukáš (advisor)
This master thesis describes stochastic optimization algorithms inspired in nature that use population of individuals - evolutionary algorithms. Genetic programming and its variant - cartesian genetic programming is described in a greater detail. This thesis is further focused on the analysis and visualization of digital circuit evolution records. Existing tools for visualization of the circuit evolution were analysed, but because no suitable tool allowing complex analysis of the circuit evolution was found, a new set of functions was proposed and the principles of a new tool were formulated. These functions were implemented in form of an interactive GUI application in Java programming language. The application was described in detail and then used for analysis of digital circuit evolution records.
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Application Development Framework for the ARM Platform
Buchta, Petr ; Sekanina, Lukáš (referee) ; Vašíček, Zdeněk (advisor)
This master's thesis focuses on designing and implementing a framework that would offer basic program resources for application development on hardware platform FITkit Minerva. First part of this work focuses on designing a data channel between PC and the kit for which the USB interface was used. Next part focuses on implementing a channel between an ARM based microcontroller and FPGA Xilinx Spartan-6. That led to creating a special system inside FPGA that allows adding new HW components that communicate with the microcontroller, which can be used for implementing HW acceleration techniques. Another outcome of this work is a debugging interface that allows to program and debug FPGA using development environment Xilinx ISE without a need of the original Xilinx JTAG adapter. This was achieved by using the XVC protocol that allows to create a custom JTAG adapter that in this case was implemented in the software of the microcontroller.
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Evolutionary Design for Circuit Approximation
Dvořáček, Petr ; Vašíček, Zdeněk (referee) ; Sekanina, Lukáš (advisor)
In recent years, there has been a strong need for the design of integrated circuits showing low power consumption. It is possible to create intentionally approximate circuits which don't fully implement the specified logic behaviour, but exhibit improvements in term of area, delay and power consumption. These circuits can be used in many error resilient applications, especially in signal and image processing, computer graphics, computer vision and machine learning. This work describes an evolutionary approach to approximate design of arithmetic circuits and other more complex systems. This text presents a parallel calculation of a fitness function. The proposed method accelerated evaluation of 8-bit approximate multiplier 170 times in comparison with the common version. Evolved approximate circuits were used in different types of edge detectors.
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Multiobjective Optimization in EMC
Olivová, Jana ; Sekanina, Lukáš (referee) ; Křesálek,, Vojtěch (referee) ; Raida, Zbyněk (advisor)
The work is aimed to propose a methodology for creating an equivalent of composite materials used for construction of small aircraft. Such equivalent should enable to create numerical models of small aircraft in the simulation of precertication EMC tests for aircraft resistance against the lightning. Eliminating situations threatening the aircraft and passengers in the initial steps of the design will allow savings in production costs and contribute to the safety of air transport. In order to nd the equivalent of composite materials, global optimization methods will be used.
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Toolbox for the cooperation of MATLAB and external simulation programs
Moravec, Petr ; Sekanina, Lukáš (referee) ; Oliva, Lukáš (advisor)
In this Master's thesis scripting interface of two programs CST Microwave studio and Ansoft HFSS for the purpose of analysis of electromagnetic structures is described. The work is focuses control of these programs with help of scripting languages and system's interface of MS Windows XP. Next the process of connecting programs with MATLAB is shown on commented scripts together with an example of complete analysis of a chosen problem, and the import and export of results results in MATLAB. Further the functions which form programming interface between MATLAB and simulation programs are designed and implemented. The interconnection layer makes the complete control of simulating programs possible using the function description published in the official documentation of used simulation programs. The layer is described in reference manual in detail and it is used for optimization with use of Particle swarm optimalization (PSO) of planar antenna model. Then there is presented another usage of the layer for an implementation of global optimization methods - SOMA and DE including suggestion of process for comparison efficiency of optimization algorithms on simple electromagnetic models.
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