Original title: Využití verifikace pro ověřování odolnosti proti poruchám u systémů založených na FPGA
Translated title: Use of verification for testing fault-tolerance in FPGA-based system
Authors: Podivínský, Jakub ; Fišer, Petr (referee) ; Racek, Stanislav (referee) ; Kotásek, Zdeněk (advisor)
Document type: Doctoral theses
Language: eng
Publisher: Vysoké učení technické v Brně. Fakulta informačních technologií
Abstract: [eng] [cze]

Keywords: elektro-mechnický systém.; FPGA; funkční verifikace; injekce poruch; odolnost proti poruchám; spolehlivost; electro-mechanical system.; fault injection; fault tolerance; FPGA; functional verification; reliability

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: https://hdl.handle.net/11012/249414

Permalink: http://www.nusl.cz/ntk/nusl-623602


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Doctoral theses
 Record created 2024-08-25, last modified 2024-08-25


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