Original title: Komunikační rozhraní pro hardwarově akcelerované obvody
Translated title: Interface for Communication on Hardware Accelerated Circuits
Authors: Slávik, Mark ; Cíbik, Peter (referee) ; Smékal, David (advisor)
Document type: Bachelor's theses
Year: 2022
Language: slo
Publisher: Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Abstract: [slo] [eng]
Práca sa venuje popisu a implementácii rozhrania MicroSD na programovatelných logických poliach. V práce je popísaná teória oľadom FPGA, jazyka VHDL,periférie na FPGA, prostredie Vivado, VitisHLS. Ďalej je popísaná implementácia kódu a jeho simulácia. Na konci je popísané digitálne spracovanie obrazu pomocou FPGA a karty Micro SD. The work deals with the description and implementation of the MicroSD interface on programmable logic arrays. The thesis describes the FPGA theory, VHDL language, Vivado environment,pheripherals on FPGA board, VitisHLS. Next, the implementation of the code and its simulation is described. At the end, digital image processing using FPGA and Micro SD card is explained.
Keywords: Digital video processing; Ethernet; FPGA; Master; MicroSD; Slave; SPI; USB; VHDL; Vitis; Vivado

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/205478

Permalink: http://www.nusl.cz/ntk/nusl-606717


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Bachelor's theses