Original title: Univerzální modul s připojením na ethernet
Translated title: Universal ethernet module
Authors: Řeháček, Tomáš ; Valach, Soběslav (referee) ; Burian, František (advisor)
Document type: Master’s theses
Year: 2015
Language: cze
Publisher: Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Abstract: [cze] [eng]

Keywords: 3D print; Ethernet; FPGA; IPv4; logic analyzer; MII; STM32F4; UDP; 3D tisk; Ethernet; FPGA; IPv4; logický analyzátor; MII; STM32F4; UDP

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/38486

Permalink: http://www.nusl.cz/ntk/nusl-573923


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Master’s theses
 Record created 2024-04-02, last modified 2024-04-03


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