Original title: FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet
Authors: Kondys, D. ; Smékal, D.
Document type: Papers
Language: eng
Publisher: Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií
Abstract: Network cards with a hardware acceleration feature are a popular solution for meeting the ever-increasing demands for throughput in high-speed networks. Utilizing the FPGA (Field Programmable Gate Array) chips as the hardware acceleration elements, this paper presents a generic and highly modular digital circuit for FPGA that manages the transfer of data in form of Ethernet frames at rates reaching up to 400 Gbps. To achieve this, the proposed digital circuit takes advantage of the Ethernet intellectual property (IP) blocks in high-end FPGAs from Intel. By first implementing and fine-tuning it for data rates up to 100 Gbps, the next step is expanding it to reach data rates up to 400 Gbps. The created digital circuit will then be used in the FPGA design for the XpressSX AGI-FH400G network card (among others) created by companies CESNET a.l.e and REFLEX CES. Even though the target data rate is 400 Gbps, this paper focuses on the first step, which is the utilization of the Intel Ethernet hard IP blocks to reach 100 Gbps.
Keywords: 400 GbE; Agilex; CESNET; Ethernet; FPGA; Intel; NDK; Stratix 10
Host item entry: Proceedings I of the 28st Conference STUDENT EEICT 2022: General papers, ISBN 978-80-214-6029-4

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/209352

Permalink: http://www.nusl.cz/ntk/nusl-524779


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