Original title: Processor Pineapple One
Authors: Szkandera, Filip
Document type: Papers
Language: slo
Publisher: Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií
Abstract: This thesis deals with the design, simulation and making of a RISC-V based processoronly out of descrete logic components. The final product is a macrocontroller that integrates a processor,program memory, data memory, graphics card and an input-output ports in a tower structuremade of nine circuit boards. This thesis also describes a simple shell application programmed in a Clanguage, that runs natively on this device.
Keywords: CPU; RISC; RISC-V; RV32I; VGA
Host item entry: Proceedings I of the 27st Conference STUDENT EEICT 2021: General papers, ISBN 978-80-214-5942-7

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/200745

Permalink: http://www.nusl.cz/ntk/nusl-447790


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Conference materials > Papers
 Record created 2021-07-25, last modified 2021-08-22


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