Original title: Testovací modul pro vybranou část standardu IEEE 802.1Q
Translated title: Tester for chosen sub-standard of the IEEE 802.1Q
Authors: Avramović, Nikola ; Dvořák, Vojtěch (referee) ; Fujcik, Lukáš (advisor)
Document type: Master’s theses
Year: 2019
Language: eng
Publisher: Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Abstract: [eng] [cze]

Keywords: ATE; ATPG; BIST; DFT; DUT; Ethernet; FMS; FPGA; Generátor; IEEE; MAC; Monitor; OSI; PA ATE; PHY; port; reální-čas; testovaní; TSN; šablona; ATE; ATPG; BIST; DFT; DUT; Ethernet; FPGA; Generator; IEEE; MAC; Monitor; OSI; PA ATE; pattern; PHY; port; real-time; scheduling; testing; traffic; TSN

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/178269

Permalink: http://www.nusl.cz/ntk/nusl-402127


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Master’s theses
 Record created 2019-08-26, last modified 2022-09-04


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