Original title: Rapid Prototyping Platform For Reconfigurable Image Processing
Translated title: Platforma pro rychlý vývoj rekonfigurovatelného zpracování obrazu
Authors: Kovář, Bohumil ; Kloub, Jan ; Schier, Jan ; Heřmánek, Antonín
Document type: Papers
Conference/Event: Technical Computing Prague 2008 /16./, Praha (CZ), 2008-11-11 / 2008-11-11
Year: 2008
Language: eng
Abstract: [eng] [cze]
This paper outlines a proposed architecture for an integrated partial rapid prototyping dynamic reconfigurable system-on-a-chip, targeted at embedded real-time video and image processing. V tomto článku představujeme architekturu pro rychlý vývoj částečně rekonfigurovatelných systémů zpracování obrazu a videa.
Keywords: DSP; FPGA; image processing; reconfiguration
Project no.: CEZ:AV0Z10750506 (CEP), 1ET400750408 (CEP)
Funding provider: GA AV ČR
Host item entry: Technical computing Prague 2008. 16th annual conference proceedings, ISBN 978-80-7080-692-0

Institution: Institute of Information Theory and Automation AS ČR (web)
Document availability information: Fulltext is available at external website.
External URL: http://library.utia.cas.cz/separaty/2008/ZS/kovar-rapid prototyping platform for reconfigurable image processing.pdf
Original record: http://hdl.handle.net/11104/0166089

Permalink: http://www.nusl.cz/ntk/nusl-39496


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Research > Institutes ASCR > Institute of Information Theory and Automation
Conference materials > Papers