Original title: Akcelerátor pro dekódování konvolučního a Reed-Solomonova zabezpečovacího kódu
Translated title: Accelerator for Decoding Convolution and Reed-Solomon Code
Authors: Kloub, Jan ; Heřmánek, Antonín
Document type: Papers
Conference/Event: Technical computing Prague 2007. 15th annual conference, Praha (CZ), 2007-11-14 / 2007-11-14
Year: 2007
Language: cze
Abstract: [cze] [eng]
Článek popisuje implementaci hardwarových akcelerátorů a jejich využití pro dekódování konvolučního a Reed-Solomonova kódu v prostředí Matlab. Paper describes implementation of hardware accelerators for decoding convolution and Reed-Solomon code and using accelerators in Matlab.
Keywords: Accelerator; Decoding; Ethernet; FEC; FPGA; Reed-Solomon; RTDX; Viterbi
Project no.: CEZ:AV0Z10750506 (CEP), 1ET300750402 (CEP), 1ET100750408 (CEP)
Funding provider: GA AV ČR, GA AV ČR
Host item entry: Technical computing Prague 2007. 15th annual conference proceedings, ISBN 978-80-7080-658-6

Institution: Institute of Information Theory and Automation AS ČR (web)
Document availability information: Fulltext is available at the institute of the Academy of Sciences.
Original record: http://hdl.handle.net/11104/0157357

Permalink: http://www.nusl.cz/ntk/nusl-38402


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Research > Institutes ASCR > Institute of Information Theory and Automation
Conference materials > Papers