Original title: Pronciple of the New AdjustedArchitecture of R-2R D/A Converter
Authors: Polešáková, Zuzana
Document type: Papers
Language: eng
Publisher: Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií
Abstract: Original R-2R D/A Converter architecture has a shortcoming – while resolution is bigger than 7 bits, switching of MSBs causes a significant non-linearity error, which may even cause DAC to be non-monotonous. A possible solution to this issue is shown in this paper: dividing MSBs into subbits of a lower weight. Analog circuitry and digital driving is published in this paper.
Keywords: Analog Integrated Circuits; D/A Conversion; DNL; INL; R-2R DAC; Small Chip Area
Host item entry: Proceedings of the 22nd Conference STUDENT EEICT 2016, ISBN 978-80-214-5350-0

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/83899

Permalink: http://www.nusl.cz/ntk/nusl-383617


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Conference materials > Papers
 Record created 2018-07-30, last modified 2021-08-22


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