Original title: Utilization of the HSLA toolbox for the FPGA prototyping
Authors: Pohl, Zdeněk ; Líčko, M.
Document type: Papers
Conference/Event: MATLAB 2002, Praha (CZ), 2002-11-07
Year: 2002
Language: eng
Abstract: An innovative design-flow for DSP algorithms usign high-speed logarithmic arithmetic (HSLA) toolbox is introduced on a demo RLS lattice application. Utilization of toolbox provides effective design time shortening and it makes designer work easier. Firstly, scripts in Matlab are written and checked. From working scripts, design is decomposed in Simulink to cycle-exact simulation and rewritten in Celoxica DK1 tool. Finally, hardware is targeted from DK1 and results are compared with simulations.
Keywords: design flow for DSP algorithms; high-speed logarithmic arithmetic
Project no.: CEZ:AV0Z1075907 (CEP), 33544, LN00B096 (CEP)
Funding provider: ESPRIT, GA MŠk
Host item entry: MATLAB 2002. Sborník příspěvků 10. ročníku konference

Institution: Institute of Information Theory and Automation AS ČR (web)
Document availability information: Fulltext is available at the institute of the Academy of Sciences.
Original record: http://hdl.handle.net/11104/0131062

Permalink: http://www.nusl.cz/ntk/nusl-34953


The record appears in these collections:
Research > Institutes ASCR > Institute of Information Theory and Automation
Conference materials > Papers