Original title: Tuning and implementation of DSP algorithms on FPGA
Authors: Líčko, Miroslav ; Pohl, Zdeněk ; Matoušek, Rudolf ; Heřmánek, Antonín
Document type: Papers
Conference/Event: MATLAB 2001 /9./, Praha (CZ), 2001-10-11
Year: 2001
Language: eng
Abstract: The article describes an algoritms development process for FPGA. It is shown on the example of the implementation of the QR RLS algorithm. To realise it means to perform operations such multiplication, division and square root.The research indicates, that the logarithmic arithemtic unit can reused for the real data type processing in some cases such a QR RLS algoritm.The developed prototype of logaritmic unit is tested on DSP algorithms using Matlab.
Project no.: AV0Z1075907 (CEP), HSLA 33544
Funding provider: ESPRIT
Host item entry: Sborník příspěvků 9.ročníku konference MATLAB 2001

Institution: Institute of Information Theory and Automation AS ČR (web)
Document availability information: Fulltext is available at the institute of the Academy of Sciences.
Original record: http://hdl.handle.net/11104/0130760

Permalink: http://www.nusl.cz/ntk/nusl-34877


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Research > Institutes ASCR > Institute of Information Theory and Automation
Conference materials > Papers