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Original title:
Port of Pascal FPGA-logarithmic-unit simulator to Simulink/RTW
Authors:
Kadlec, Jiří
;
Matoušek, Rudolf
;
Vialatte, Christian
;
Coleman, J. N.
Document type:
Papers
Conference/Event:
MATLAB '99 /7./
, Praha (CZ), 1999-11-03
Year:
1999
Language:
eng
Project no.:
AV0Z1075907
(
CEP
),
OK 314
,
OK 317
,
ESPRIT 23544 HSLA
Funding provider:
MŠMT, MŠMT, Commission EC
Host item entry:
Sborník příspěvků 7. ročníku konference MATLAB '99
Institution:
Institute of Information Theory and Automation AS ČR (
web
)
Document availability information:
Fulltext is available at the institute of the Academy of Sciences.
Original record:
http://hdl.handle.net/11104/0130257
Permalink:
http://www.nusl.cz/ntk/nusl-34730
The record appears in these collections:
Research
>
Institutes ASCR
>
Institute of Information Theory and Automation
Conference materials
>
Papers
Record created 2011-07-01, last modified 2024-01-26
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