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National Repository of Grey Literature 3 records found  Search took 0.00 seconds. 
Implementation of SHA-3 algorithm in FPGA
 Ohnút, Petr ; Macho, Tomáš (referee) ; Valach, Soběslav (advisor)
This Bachelors's thesis is focused on the description of SHA3 algorithm, an FPGA technology, and the possibility to implement the SHA3 algorithm into FPGA. It also deals with our design and implementation in Python and VHDL.
Detailed record
Testbed for Simulation of MCU Application using RTL Environment
 Ohnút, Petr ; Burian, František (referee) ; Arm, Jakub (advisor)
The thesis is focused on creating a test framework for easy simulation and configuration of mcu applications. The framework also provides basic processing of simulation output data, such as measuring UART or SPI communication speed, checking the expected instruction with the currently executed one, counting the executed individual instructions during the simulation, etc. Test scenarios are designed to simulate the implemented functionalities of the framework. Finally, the results of each test scenario are discussed.
Detailed record
Implementation of SHA-3 algorithm in FPGA
 Ohnút, Petr ; Macho, Tomáš (referee) ; Valach, Soběslav (advisor)
This Bachelors's thesis is focused on the description of SHA3 algorithm, an FPGA technology, and the possibility to implement the SHA3 algorithm into FPGA. It also deals with our design and implementation in Python and VHDL.
Detailed record

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