National Repository of Grey Literature 1 records found  Search took 0.00 seconds. 
Instruction Scheduler of C Compiler for Pipelined Architectures
Kocina, Filip ; Husár, Adam (referee) ; Hruška, Tomáš (advisor)
This work is engaged in the backend of a C compiler, in particular the instruction scheduler. It analyzes possibilities of the instruction scheduler in the LLVM compiler platform. It describes substitution of the current delay slot filler for MIPS architecture.

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