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Control and monitoring unit for optical link station
Podzimek, David ; Vařacha, František (referee) ; Prokeš, Aleš (advisor)
The aim of Master thesis "Control and monitoring unit for optical link station" is a web server, enabling communication microcontroller with the user. The communication is based on TCP/IP model. Work an overview of the various parts of the TCP/IP model. The main part of this work is devoted to the software created. The core of unit are microcontroller C8051F120 and ethernet controller CP2200 made by Silicon Laboratories.
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Model of computer network in MATLAB/SIMULINK environment
Zedníček, Petr ; Zeman, Václav (referee) ; Kolka, Zdeněk (advisor)
The bachelor thesis deals with simulation of TCP protocol behaviour in Wireless optical environment. The thesis examines the various parameters of the protocol and evaluates their response to the transmission speed. The key objectives of the thesis are the introduction to the problems of communication, specially the description of the transport layer architecture, TCP / IP and congestion management mechanism NewReno. A large part of the thesis is devoted to modelling communication points and a model of optical wireless connections. The results will be applicable to create a new communication protocol for Wireless optical environment.
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Design of unicast and multicast models in NS2
Votava, Martin ; Burget, Radim (referee) ; Šimek, Milan (advisor)
This work is focused on Network Simulator 2 - tool used for simulating network implementations. Focal point of this work is simulating of unicast and multicast routing. This work also describes protocols used on transport layer, such TCP (Transmission Control Protocol) and UDP (User Datagram Protocol). Last but not least work includes laboratory part in which reader is able to verify reached knowledge in Unicast and Multicast simulation.
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Small Computer Network Design
Bátora, Peter ; Jordán, Vilém (referee) ; Ondrák, Viktor (advisor)
The aim of this thesis is to analyse the current state of the computer network of the company and its requirements to improve the network, then to propose necessary changes and how they are going to be implemented. The work will also be a description of the appropriate network components, technology selection, and implementation process.
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Implementation of Delta-t Transport Protocol
Chovanec, Zdeněk ; Marek, Marcel (referee) ; Koutenský, Michal (advisor)
Transportní protokol Delta-t se v současné době vyskytuje pouze ve formě návrhu. Cílem této práce je vytvoření implementace protokolu v prostředí Linuxového TCP/IP zásobníku. Implementace bude mít formu zásuvného modulu. Protokol Delta-t patří mezi protokoly zajišťující obousměrný spolehlivý přenos. Protokol přichází s velmi jednoduchým a efektivním způsobem správy spojení. Spolehlivé sestavení a ukončení spojení není realizováno prostřednictvím handshake zpráv. Aktuální stav spojení je dán pouze dobou, která uběhla od posledního přijetí či odeslání datového segmentu. V ostatních aspektech se Delta-t podobá protokolu TCP, a proto budou jejich implementace vzájemně porovnány.
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Implementation of ethernet communication inteface into FPGA chip
Skibik, Petr ; Fujcik, Lukáš (referee) ; Bohrn, Marek (advisor)
The thesis deals with the implementation of Ethernet-based network communication interface into FPGA chip. VHDL programming language is used for description of the hardware. The interface includes the implementation of link-layer Ethernet protocol and network protocols such as IPv4, ARP, ICMP and UDP. The final design allows bi-directional communication on the transport-layer level of TCP/IP model. The designed interface was implemented into Virtex5 FPGA chip on development board ML506 by Xilinx.
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Implementation of Delta-t Transport Protocol
Chovanec, Zdeněk ; Marek, Marcel (referee) ; Koutenský, Michal (advisor)
Transportní protokol Delta-t se v současné době vyskytuje pouze ve formě návrhu. Cílem této práce je vytvoření implementace protokolu v prostředí Linuxového TCP/IP zásobníku. Implementace bude mít formu zásuvného modulu. Protokol Delta-t patří mezi protokoly zajišťující obousměrný spolehlivý přenos. Protokol přichází s velmi jednoduchým a efektivním způsobem správy spojení. Spolehlivé sestavení a ukončení spojení není realizováno prostřednictvím handshake zpráv. Aktuální stav spojení je dán pouze dobou, která uběhla od posledního přijetí či odeslání datového segmentu. V ostatních aspektech se Delta-t podobá protokolu TCP, a proto budou jejich implementace vzájemně porovnány.
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Small Computer Network Design
Bátora, Peter ; Jordán, Vilém (referee) ; Ondrák, Viktor (advisor)
The aim of this thesis is to analyse the current state of the computer network of the company and its requirements to improve the network, then to propose necessary changes and how they are going to be implemented. The work will also be a description of the appropriate network components, technology selection, and implementation process.
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Design of unicast and multicast models in NS2
Votava, Martin ; Burget, Radim (referee) ; Šimek, Milan (advisor)
This work is focused on Network Simulator 2 - tool used for simulating network implementations. Focal point of this work is simulating of unicast and multicast routing. This work also describes protocols used on transport layer, such TCP (Transmission Control Protocol) and UDP (User Datagram Protocol). Last but not least work includes laboratory part in which reader is able to verify reached knowledge in Unicast and Multicast simulation.
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Implementation of ethernet communication inteface into FPGA chip
Skibik, Petr ; Fujcik, Lukáš (referee) ; Bohrn, Marek (advisor)
The thesis deals with the implementation of Ethernet-based network communication interface into FPGA chip. VHDL programming language is used for description of the hardware. The interface includes the implementation of link-layer Ethernet protocol and network protocols such as IPv4, ARP, ICMP and UDP. The final design allows bi-directional communication on the transport-layer level of TCP/IP model. The designed interface was implemented into Virtex5 FPGA chip on development board ML506 by Xilinx.
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