National Repository of Grey Literature 4 records found  Search took 0.00 seconds. 
FFT implementation in FPGA and ASIC
Dvořák, Vojtěch ; Bohrn, Marek (referee) ; Fujcik, Lukáš (advisor)
The aim of this thesis is to design the implementation of fast Fourier transform algorithm, which can be used in FPGA or ASIC circuits. Implementation will be done in Matlab and then this form of implementation will be used as a reference model for implementation of fast Fourier transform algorithm in VHDL. To verify the correctness ofdesign verification enviroment will be created and verification process wil be done. Program that will generate source code for various parameters of the module performing a fast Fourier transform will be created in the last part of this thesis.
Design of bandpass digital filter
Dvořák, Vojtěch ; Pristach, Marián (referee) ; Fujcik, Lukáš (advisor)
The aim of this work is to explain the problems of digital IIR filters, demostrate process of designing digital filters in Matlab and design a model of ideal band-pass filter with concrete parameters in Matlab. This filter will then serve as a reference model for verification with the filter described in VHDL.
Design of bandpass digital filter
Dvořák, Vojtěch ; Pristach, Marián (referee) ; Fujcik, Lukáš (advisor)
The aim of this work is to explain the problems of digital IIR filters, demostrate process of designing digital filters in Matlab and design a model of ideal band-pass filter with concrete parameters in Matlab. This filter will then serve as a reference model for verification with the filter described in VHDL.
FFT implementation in FPGA and ASIC
Dvořák, Vojtěch ; Bohrn, Marek (referee) ; Fujcik, Lukáš (advisor)
The aim of this thesis is to design the implementation of fast Fourier transform algorithm, which can be used in FPGA or ASIC circuits. Implementation will be done in Matlab and then this form of implementation will be used as a reference model for implementation of fast Fourier transform algorithm in VHDL. To verify the correctness ofdesign verification enviroment will be created and verification process wil be done. Program that will generate source code for various parameters of the module performing a fast Fourier transform will be created in the last part of this thesis.

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