National Repository of Grey Literature 4 records found  Search took 0.01 seconds. 
Audio equalizer implementation based on FPGA structure
Otisk, Libor ; Valach, Soběslav (referee) ; Kváš, Marek (advisor)
The bachelor thesis introduces the basic types of audio equalizers. It describes the design of digital filters for graphic equalizer, the correct choice of structure, placement and shape of digital filters. It also describes the implementation of graphic equalizer in the fixed-point arithmetic. It further describes an implementation of the algorithm graphic equalizer on PC and the implementation in gate array of FPGA.
Simulation tool for fixed-point arithmetic
Grézl, Vojtěch ; Kunz, Jan (referee) ; Čala, Martin (advisor)
This bachelor's thesis is focused on creating tool for simulating calculations with fixed point. This tool simplifies and increases the efficiency of performing operations with values of different data types. By calculating and graphically displaying absolute errors, which creates a conversion of values between data types and conversion through maximum absolute errors, the user can evaluate whether this conversion is optimal or not. After getting acquainted with this issue in the theoretical introduction part, the design of the practical part follows, which summarizes the implementation and procedure of program design in the LabVIEW 2021. Process of draft of the practical part is based on attributes of LabVIEW and it’s part FPGA module and aim on creating of transparent and user-friendly user interface. The output of the practical part is a tool that works with the created VI, containing a sequence of different operations with different input and output data types. The program is used to convert numbers of different data types to another type, mainly for a conversion to a fixed point data type. The user gives the main direction by creating a sample VI, the operations of which will then be performed. Other parameters that the user can set and affect the program are listed on the user interface.
Simulation tool for fixed-point arithmetic
Grézl, Vojtěch ; Kunz, Jan (referee) ; Čala, Martin (advisor)
This bachelor's thesis is focused on creating tool for simulating calculations with fixed point. This tool simplifies and increases the efficiency of performing operations with values of different data types. By calculating and graphically displaying absolute errors, which creates a conversion of values between data types and conversion through maximum absolute errors, the user can evaluate whether this conversion is optimal or not. After getting acquainted with this issue in the theoretical introduction part, the design of the practical part follows, which summarizes the implementation and procedure of program design in the LabVIEW 2021. Process of draft of the practical part is based on attributes of LabVIEW and it’s part FPGA module and aim on creating of transparent and user-friendly user interface. The output of the practical part is a tool that works with the created VI, containing a sequence of different operations with different input and output data types. The program is used to convert numbers of different data types to another type, mainly for a conversion to a fixed point data type. The user gives the main direction by creating a sample VI, the operations of which will then be performed. Other parameters that the user can set and affect the program are listed on the user interface.
Audio equalizer implementation based on FPGA structure
Otisk, Libor ; Valach, Soběslav (referee) ; Kváš, Marek (advisor)
The bachelor thesis introduces the basic types of audio equalizers. It describes the design of digital filters for graphic equalizer, the correct choice of structure, placement and shape of digital filters. It also describes the implementation of graphic equalizer in the fixed-point arithmetic. It further describes an implementation of the algorithm graphic equalizer on PC and the implementation in gate array of FPGA.

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