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National Repository of Grey Literature 2 records found  Search took 0.01 seconds. 
Design and Implementation of Mechanisms for Enhancing Performance of CPU
 Zlatohlávková, Lucie ; Sekanina, Lukáš (referee) ; Strnadel, Josef (advisor)
This masters thesis is focused on the issue of processor architecture. The ground of this project is a design of a simple processor, which is enriched by modern components in processor architecture such as pipelining, cache memory and branch prediction. The processor has been made in VHDL programming language and was simulated in ModelSim simulation tool.
Detailed record
Design and Implementation of Mechanisms for Enhancing Performance of CPU
 Zlatohlávková, Lucie ; Sekanina, Lukáš (referee) ; Strnadel, Josef (advisor)
This masters thesis is focused on the issue of processor architecture. The ground of this project is a design of a simple processor, which is enriched by modern components in processor architecture such as pipelining, cache memory and branch prediction. The processor has been made in VHDL programming language and was simulated in ModelSim simulation tool.
Detailed record

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