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Electronic Chessboard on the FITKit Platform
Kubín, Jakub ; Zachariášová, Marcela (referee) ; Kaštil, Jan (advisor)
This thesis deals with the analysis, design and implementation of chess on FITkit platform. The platform is connected to the VGA monitor, on which is shown the chessboard with the figures. The game is controlled by using the keyboard on FITkit platform. The work describes the realisation of the unit for the display of the checkerboard that is implemented in the programmable gate field. Software of the microcontroller controls the depictive unit, generates possible moves and checks strokes of figures. There is a control whether the King does not have the check and if the game is not over because of checkmate or stalemate.
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FPGA implementation of artificial neural network
Čermák, Justin ; Šteffan, Pavel (referee) ; Bohrn, Marek (advisor)
This master's thesis describes the design of effective working artificial neural network in FPGA Virtex-5 series with the maximum use of the possibility of parallelization. The theoretical part contains basic information on artificial neural networks, FPGA and VHDL. The practical part describes the used format of the variables, creating non-linear function, the principle of calculation the single layers, or the possibility of parameter settings generated artificial neural networks.
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Network Interface for Microblaze
Janík, Lukáš
This article deals with interfacing of Xilinx MicroBlaze (UB) softcore microprocessor to 1 Gb/s Ethernet data bus via custom simple Ethernet switch. This interface is implemented on an FPGA board and serves as the lower communication layer for administration of gigabit Ethernet-tooptical bridge.
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Electronic Chessboard on the FITKit Platform
Kubín, Jakub ; Zachariášová, Marcela (referee) ; Kaštil, Jan (advisor)
This thesis deals with the analysis, design and implementation of chess on FITkit platform. The platform is connected to the VGA monitor, on which is shown the chessboard with the figures. The game is controlled by using the keyboard on FITkit platform. The work describes the realisation of the unit for the display of the checkerboard that is implemented in the programmable gate field. Software of the microcontroller controls the depictive unit, generates possible moves and checks strokes of figures. There is a control whether the King does not have the check and if the game is not over because of checkmate or stalemate.
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FPGA implementation of artificial neural network
Čermák, Justin ; Šteffan, Pavel (referee) ; Bohrn, Marek (advisor)
This master's thesis describes the design of effective working artificial neural network in FPGA Virtex-5 series with the maximum use of the possibility of parallelization. The theoretical part contains basic information on artificial neural networks, FPGA and VHDL. The practical part describes the used format of the variables, creating non-linear function, the principle of calculation the single layers, or the possibility of parameter settings generated artificial neural networks.
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