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Traffic Modelling Based on Cellular Automata
Hodaňová, Andrea ; Martinek, David (referee) ; Peringer, Petr (advisor)
Among many other fields of science, cellular automata play an important role also in the microsimulations of traffic. In this thesis, we analyze the characteristics of a wide range of cellular automata traffic models from the most simple deterministic ones to complex stochastic automata derived from the pivotal Nagel-Schreckenberg model, which is thoroughly described. As a result of this analysis, a generally usable traffic simulator is designed and implemented in the Java programming language. Its graphical user interface can visualise the state of a road CA to display the key features of the implemented traffic models to the user.
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Hardware Acceleration Using Functional Languages
Hodaňová, Andrea ; Kadlček, Filip (referee) ; Fučík, Otto (advisor)
The aim of this thesis is to research how the functional paradigm can be used for hardware acceleration with an emphasis on data-parallel tasks. The level of abstraction of the traditional hardware description languages, such as VHDL or Verilog, is becoming to low. High-level languages from the domains of software development and modeling, such as C/C++, SystemC or MATLAB, are experiencing a boom for hardware description on the algorithmic or behavioral level. Functional Languages are not so commonly used, but they outperform imperative languages in verification, the ability to capture inherent paralellism and the compactness of code. Data-parallel task are often accelerated on FPGAs, GPUs and multicore processors. In this thesis, we use a library for general-purpose GPU programs called Accelerate and extend it to produce VHDL. Accelerate is a domain-specific language embedded into Haskell with a backend for the NVIDIA CUDA platform. We use the language and its frontend, and create a new backend for high-level synthesis of circuits in VHDL.
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Traffic Modelling Based on Cellular Automata
Hodaňová, Andrea ; Martinek, David (referee) ; Peringer, Petr (advisor)
Among many other fields of science, cellular automata play an important role also in the microsimulations of traffic. In this thesis, we analyze the characteristics of a wide range of cellular automata traffic models from the most simple deterministic ones to complex stochastic automata derived from the pivotal Nagel-Schreckenberg model, which is thoroughly described. As a result of this analysis, a generally usable traffic simulator is designed and implemented in the Java programming language. Its graphical user interface can visualise the state of a road CA to display the key features of the implemented traffic models to the user.
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Hardware Acceleration Using Functional Languages
Hodaňová, Andrea ; Kadlček, Filip (referee) ; Fučík, Otto (advisor)
The aim of this thesis is to research how the functional paradigm can be used for hardware acceleration with an emphasis on data-parallel tasks. The level of abstraction of the traditional hardware description languages, such as VHDL or Verilog, is becoming to low. High-level languages from the domains of software development and modeling, such as C/C++, SystemC or MATLAB, are experiencing a boom for hardware description on the algorithmic or behavioral level. Functional Languages are not so commonly used, but they outperform imperative languages in verification, the ability to capture inherent paralellism and the compactness of code. Data-parallel task are often accelerated on FPGAs, GPUs and multicore processors. In this thesis, we use a library for general-purpose GPU programs called Accelerate and extend it to produce VHDL. Accelerate is a domain-specific language embedded into Haskell with a backend for the NVIDIA CUDA platform. We use the language and its frontend, and create a new backend for high-level synthesis of circuits in VHDL.
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