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FFT implementation in FPGA and ASIC
Dvořák, Vojtěch ; Bohrn, Marek (referee) ; Fujcik, Lukáš (advisor)
The aim of this thesis is to design the implementation of fast Fourier transform algorithm, which can be used in FPGA or ASIC circuits. Implementation will be done in Matlab and then this form of implementation will be used as a reference model for implementation of fast Fourier transform algorithm in VHDL. To verify the correctness ofdesign verification enviroment will be created and verification process wil be done. Program that will generate source code for various parameters of the module performing a fast Fourier transform will be created in the last part of this thesis.
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Concrete ribbed slab
Dvořák, Vít ; Perla, Jan (referee) ; Strnad, Jiří (advisor)
The bachelor thesis deals with a design of monolithic reinforced concrete, line supported and cross reinforced slab and a design of supporting reinforced concrete ribs. The plan of the slabs is rectangular and one time bent. The content bachelor thesis is calculation and design of reinforcement of slab and ribs. For the calculation was used software Scia Engineer 14 and was checked by manually calculation. The slab is located in the first floor of polyfunctional house. Other parts of the object are not covered by the thesis.
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High-Level Synthesis of Digital Circuits
Jendrušák, Ján ; Fujcik, Lukáš (referee) ; Dvořák, Vojtěch (advisor)
This thesis deals with practical test of high-level synthesis as a digital circuits design method and its current progress in creating RTL models. At first main tasks of HLS will be described together with C++ library of classes called SystemC, which implements hardware constructs, notion of time and hardware datatypes with arbitrary bit width. After that thesis focuses on discrete Fourier transform and its fast form of computation – fast Fourier transform. In the practical part of thesis reference FFT model is written in C++ language, which is later edited appropriately a synthesized with Stratus High-Level Synthesis tool into several hardware architectures.
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HLS development tool for DSP with custom programming language
Pastušek, Václav ; Dvořák, Vojtěch (referee) ; Fujcik, Lukáš (advisor)
Nowadays, there are many different high-level syntheses for describing digital circuits. The best known ones generate VHDL code from programming languages such as ANSI C, C++, SystemC, SystemVerilog and MATLAB. But not everyone will identify with that type of programming, so sometimes it's good to go to a higher level of abstraction, where the internals of the components are hidden, and then the components are called with inputs and outputs. This thesis deals with the design of HLS, the design of input pseudocode, pseudo-libraries, compiler created in Python, its modules and practical application.
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Measurement parameters of communication via PCI Express
Dujiček, Ondřej ; Dvořák, Vojtěch (referee) ; Pristach, Marián (advisor)
This bachelor thesis deals with parameters affecting throughput of PCI Express bus and its main result is a design and implementation of a unit for measuring parameters of communication over PCI Express bus. The unit is implemented in VHDL language and its support on generating and measuring traffic at speeds up to 100 Gbps. Unit’s operation frequency, when implemented in Virtex 7 available at COMBO-100G , is 200 MHz. The implemented unit is controlled from software through MI32 interface and it is able to measure the amount of transferred packets and data in both receive and transmit directions. This information can be exported into software using MI32 interface.
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Design of Planar Optical Waveguide
Dvořák, Václav ; Friedl, Martin (referee) ; Nešpor, Dušan (advisor)
This bachelor´s thesis deals with the theoretical fundamentals of planar optical waveguides, possibilities of their fabrication and design of planar optical waveguide. Design of waveguide will be simulated using FDTD Solutions and Ansoft HFSS. These two software use different techniques for computational simulation. The parameters of waveguide will be modified to achieve better performance of waveguide. The result will be compare the properties of waveguides. There will be also described design of implementing waveguide.
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Design of a photovoltaic power plant for a family house near Jihlava
Dvořák, Vít ; Maule, Petr (referee) ; Vaněk, Jiří (advisor)
This diploma thesis deals with the design of a photovoltaic solar power station for a specific family house in the Jihlava region. The aim of the work was to get acquainted with technologies about the production of solar systems, evaluate the market in the Czech Republic and create a design of photovoltaic solar power station. Three designs of power stations were created with the help of the PV * SOL design system. Each design uses different photovoltaic cell technology. The result of each power station design is a complete finished project, which is based on many factors such as the efficiency of the entire system in a certain location, financial analysis, return on investment and more. In addition, these projects meet the conditions for the preparation of the subsidy program Nová zelená úsporám. At the end of the work, all three designed power stations are evaluated and with the help of multicriteria analysis, the best and most advantageous power station design for the given locality is determined. In the end, the idea of further development of the project is presented.
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Fast Reconstruction of Photoacoustic Images
Kukliš, Filip ; Dvořák, Václav (referee) ; Jaroš, Jiří (advisor)
The ability of reconstruction of photoacoustic images is important requirement to study soft tissues or vascular and lymphatic systems in high resulution but in small space. Today solution needs extensive computing power and it is noticeably time-consuming. In this study we would like to introduce a new solution which would be a way much faster and easy to use. My solution is up to 20x faster and needs forty percent less memory. This solution may be a better alternative for scietnist who study soft tissues by photoacoustic imaging.
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A Test Interface for Integrated Circuits with the Small Number of Pins
Tománek, Jakub ; Dvořák, Vojtěch (referee) ; Šťáva, Martin (advisor)
This study explores the possibilities for reducing the number of pins needed for scan mode interface. In the first part of this paper the existing solutions and methods that are usable for this purpose are described. Specific four pin, three pin, two pin, one pin and zero pin interfaces are designed in second part. Advantages and disadvantages of existing solutions and methods as well as designed and proposed interface are summarized in the conclusion.
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