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Generator of Instruction Set Manual
Křen, Michal ; Přikryl, Zdeněk (referee) ; Hruška, Tomáš (advisor)
This bachelor thesis describes the design and implementation of a generator of instruction set manual, that is a part of the Lissom project. Model of microprocessor is described using architecture and instruction set description language ISAC with added special marked comments to each one declaration. From this source of data useful information and relationships between them are selected for manual. The source of data for generating of instructions is the intermediate-language for generator of C language compiler. The output generated manual document is saved as RTF file and it contains two parts. First part includes summary of all microprocessor's resources and second part contains the list of all instructions.
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Automatic Tool-Chain Testing System
Aschenbrenner, Vojtěch ; Šuška, Boris (referee) ; Hruška, Tomáš (advisor)
Project Lissom is developing environment for design application specific processors or SoC (System on Chip). Project developes tools like assembler, disassembler, simulator, C compiler etc. Environment testing is required and It's main reason for this work. The work is about software testing, types of testing and about existing testing systems. The inspiration from existing systems is used for design and implementation Lissom testing system. System is comparing tools outputs with reference files. The system needs Bugzilla client end e-mail sender for complete functionality. These tools were also created.
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On-Chip Debugger Generator
Hrbáček, Radek ; Mecera, Martin (referee) ; Hruška, Tomáš (advisor)
This bachelor's thesis deals with the design and implementation of an on-chip debugger and its connection to the hardware generated using software tools developed as a part of the Lissom project. The first part introduces the JTAG and Nexus 5001 standards, which the implemented interface complies with. The practical part includes detailed description of the developed tool and its testing. The result is a functional on-chip debugger that has been tested with the Codea processor on the FITKit educational platform.
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Optimizing Linker
Novosád, Adrián ; Trmač, Miloslav (referee) ; Hruška, Tomáš (advisor)
Project Lissom is developing environment for design application specific processors or SoC(System on Chip). Developing of software for these processors are based on using standard libraries offered by programming languages. Main problem of these libraries is in their extensiveness, because programmers often use only a small part of functions contained in included libraries. This may cause that even a tiny looking program needs large storage space and the program will not fit in the system memory. This work is about implementation of link-time optimizer, which inserts into output program only needed function from libraries. This code-size reduction is based on technique called unreachable code elimination.
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C Back-End for a Decompiler
Urban, Martin ; Ďurfina, Lukáš (referee) ; Zemek, Petr (advisor)
This thesis deals with the implementation of the back-end of the decompiler, which produces a code in C language. It contains basic information about the principals and using of the reverse engineering either in the area of information technology or apart from it. The main goal is to create the back-end of the decompiler which would generate a code that would be equivalent against the input and will be translatable into a binary code. Functionality of the output code will be conserved in state of the functionality of the source code. The output is the implementation of the classes in C++ language. It does described activity as a part of the general decompiler which is developed in terms of the project Lissom.
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Middleware for HW/SW Co-Design
Hons, Petr ; Husár, Adam (referee) ; Masařík, Karel (advisor)
This thesis deals with design and implementation of new version of Middleware server and communication library. New version uses design pattern Reactor to handle multiple requests from different sources. Thesis describes platform-independent solution of logging, executing and controlling processes, storage of filesystem paths and design of plugin architecture to enhance server flexibility. Communication library described in this thesis allows network communication using XML protocol, SSL encryption using OpenSSL library and encapsulation of messages from users. This library is used by other projects, which communicates with Middleware server. There was created an implementation according to design. Implementation was tested by Lissom team and is now used actively.
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Decompiler Front-End Optimizations
Odaloš, Matej ; Ďurfina, Lukáš (referee) ; Křoustek, Jakub (advisor)
Decompiler is a reverse engineering tool for translation of binary codes into one of the higher level languages. This bachelor thesis describes such a tool paying special attention on decompiler of the Lissom project. There are proposed several techniques for translation optimalization like static LLVM IR code interpretation and memory for its results. Other optimalizations are conserning addition of platform dependent features like delay slot support or memory datalayout and endianness detection. Finally implemented techniques are demostrated on several examples.
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Enhancement of Decompilation Results
Končický, Jaromír ; Ďurfina, Lukáš (referee) ; Křoustek, Jakub (advisor)
As a part of the Lissom project, a retargetable decompiler is being developed. Its main purpose is to decompile programs for any particular microprocessor architecture into any high-level programming language. At this thesis's beginning time, its results are not optimal because the decompiler doesn't utilize all program's additional information during decompilation that can improve the results. In this thesis, reverse engineering and Lissom decompiler is described. Techniques of using additional information to enhance decompilation results are proposed. These are data section content analysis and debug information analysis (specifically the debug information in PDB format which is proprietary format). Exploration of internal PDB structure and its content is a part of this thesis. The implementation of data section analysis and debug information utilizing is described and in the end, final decompilation results are discussed.
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Debugger for Generic Microprocessor Simulators
Wilczák, Milan ; Husár, Adam (referee) ; Přikryl, Zdeněk (advisor)
Application specific instruction set processors become part of every day life although it's not always visible at first sight. During their development it's needed to somehow describe their architecture, instruction set and behavior. To make their developement worth, it's necessary to be able to create applications for these processors and during application development errors are always made. Debuggers serve to discover and help fixing them. This paper summarises some basic information to debugger development and describes implementation for processors created using the Lissom project.
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