National Repository of Grey Literature 36 records found  beginprevious26 - 35next  jump to record: Search took 0.00 seconds. 
Communication on the ADSP-SC58x Chip
Havran, Jan ; Korček, Pavol (referee) ; Viktorin, Jan (advisor)
This projects describes the design of communication between SHARC and ARM cores on ADSP-SC58x platform, concretely between bare-metal and Linux applications on ADSP-SC589 chips. There are outlined several available technologies for data transfer, such as MCAPI, MDMA or shared memory. There are also designed and implemented new communication principes based on current implementations of these technologies.
FPGA Module for Fast Waveform Generation and Synchronous Data Acquisition
Eliáš, Josef
This article deals with system for fast waveform generation and synchronous data acquisition. System is used for evaluation of optical sensors by sweep through narrow band light source. The DAQ system use dual core ARM processor with build in FPGA array. We can achieve direct sharing memory between ARM core and AD/DA periphery through SoC architecture. Then we can optimally distributed core usage between processors and peripherals.
Framework for Reconfigurable Systems on the Altera Chips
Kremel, Bruno ; Košař, Vlastimil (referee) ; Korček, Pavol (advisor)
This work reviews the development frameworks available for the Altera System-On-Chip solutions. These solutions are then compared to solutions available on the Xilinx platform. The RSoC Framework is then presented as an advantageous alternative for the vendor's solutions. This framework is currently available for the Xilinx Zynq platform. Furthermore the work assess the key differences between Xilinx Zynq and Altera Cyclone V SoC platforms and proposes the solution to port the framework to Altera platform. The design and implementation of then RSoC Framework port to Altera Cyclone V SoC is then discussed. Finally the work evaluates the performance of the ported system on the new platform.
HDR Tone-Mapping Acceleration on Xilinx Zynq Platform
Nosko, Svetozár ; Zemčík, Pavel (referee) ; Musil, Martin (advisor)
This diploma thesis focuses on the High-level synthesis (HLS). The first part deals with theoretical details and methods that are used in HLS tools. This is followed by a description of the synthesis tool Vivado HLS which will be used for implementation of an application. In the second part is briefly introduced high dynamic range images (HDR) and tone mapping. The third part is dedicated to design and implementation of the aplication which implements tone mapping methods in HDR images. This methods are implemented in Vivado HLS and language C++. This application is based on platform Xilinx Zynq and it uses multiexposure camera for capturing HDR images. Images are transmitted to FPGA for tone mapping processing.
The current condition of soil organic matter in Stropnicko selected sites
BOROVKA, Jan
The main objective of this thesis was to determine the current status of soil organic matter (SOM) in the Stropnice River basin based on the collected soil samples. SOM is a major source of carbon in the soil. The amount of soil organic carbon (SOC) in the samples was measured using the FORMACSHT TOC / TN analyser, as well as the additional module PRIMACSMCS (fa Skalar - CARBON Instruments Ltd.). The values measured in 2014 were compared according to the land use (woodland, grassland, arable land) and the depth of sampling (A: 0-15 cm, B: 15 - 30 cm, C: 30 - 45 cm). Furthermore, these values were compared with values from 2001 and 2007. The highest SOC concentration was found in the upper layers of forest soils, grassland soils showed lower SOC content, whereas the arable land showed the lowest amount of SOC. Over the time, depletion of SOC is evident for all categories of land use.
Design of Communication Protocol for Generic Simulators of Microprocessors
Moskovčák, Jiří ; Kolář, Dušan (referee) ; Masařík, Karel (advisor)
This work concerns about designing of communication protocol for generic processor simulator. The main objective of this work was to design a communication protocol which allows to simulate multiprocessor system on a cluster of computers.
HW/SW Codesign for the Xilinx Zynq Platform
Viktorin, Jan ; Košař, Vlastimil (referee) ; Korček, Pavol (advisor)
This work describes a novel approach of HW/SW codesign on the Xilinx Zynq and similar platforms. It deals with interconnections between the Processing System (ARM Cortex-A9 MPCore) and the Programmable Logic (FPGA) to find an abstract and universal way to develop applications that are partially offloaded into the programmable hardware and that run in the Linux operating system. For that purpose a framework for HW/SW codesign on the Zynq and similar platforms is designed. No such framework is currently available.
Asymmetric Multiprocessing on the ARM Cortex-A9
Riša, Michal ; Košař, Vlastimil (referee) ; Korček, Pavol (advisor)
Asymmetric multiprocessing (AMP) is a way of distributing computer system load toheterogeneous hardware and software environment. This thesis describes the principles of the AMP focusing on the ARM Cortex--A9 processor and Altera Cyclone V hardware platform. Development of a OpenAMP framework based AMP system showing communication among the processor cores, documentation and future work suggestion are the products of this thesis.
Universal hardware platform supported Linux operation system
Skopal, Miroslav ; Matěj, Zdeněk (referee) ; Fedra, Zbyněk (advisor)
This thesis deals with the development problems and creating of the multi- purpose hardware platform, which supports operating system Linux. It is focused on the microprocessors using ARM architecture with architecture ARM7, ARM9 and ARM11. The scope of the first part of this thesis was searching the sales of available 32 bit ARM microprocessors. The second part is attended to a particular Mini2440 development kit, its animation and the subsequent development of the kernel drivers for OS Linux platform. One of this thesis details was also the development of my own expansive hardware module and a capacity keypad for a usage with Mini2440 developmental kit.
Advancing Packiging and 3D systems
Nicák, Michal ; Šandera, Josef (referee) ; Szendiuch, Ivan (advisor)
This project consists of three parts. The first part is aimed to summarize list of actual packaging systems and especially systems using 3D construction. Project continues in the second part, which is more practical and contains design and production of organic and inorganic testing substrates for lead-free soldered 3D structures. Last experimental part is about tests performed on soldered substrates and evaluation of results of these practical tests.

National Repository of Grey Literature : 36 records found   beginprevious26 - 35next  jump to record:
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