|
|
Electromagnetic levitation
Kondys, David ; Červinka, Dalibor (referee) ; Martiš, Jan (advisor)
The thesis deals with the issue of magnetic levitation. It is divided into two main chapters. The first chapter is focused on a general introduction to magnetic levitation. It describes the types of magnetic levitation, their use and the principle of execution. The end of the chapter is focused on a more detailed description of magnetically levitated MAGLEV trains. It describes the history of these trains, their use and construction. The second chapter is focused on the design of a device for demonstrating magnetic levitation. First, it deals with the simulation of an electromagnetic problem in the FEMM program. In addition, for the selected position configuration of the electromagnet and levitating magnet, it describes the design of the construction of the device in SOLIDWORKS and its manufacture. The result of the work is an attempt to make such a device that can stably keep the levitating magnet in the air.
|
|
|
Applied use of DSP blocks in Intel FPGA
Kondys, Daniel ; Pokorný, Jiří (referee) ; Smékal, David (advisor)
This bachelor's thesis explores the utilization of DSP blocks located particularly on FPGA Stratix 10 DX 2800 for the implementation of a counter and a comparator. In the theoretical part, topics such as the protocol Ethernet, the FPGA technology and its relation with Network Interface Controllers are explained, followed by a~description of general design flow for digital circuits on FPGAs and a detailed insight on DSP blocks in the Virtex UltraScale+ XCVU7P and Stratix 10 DX 2800 FPGAs. The practical part focuses on the design, implementation and testing of the counter and comparator, followed by measurements of their impact on FPGA's resource utilization and maximum frequency. Lastly, it describes the integration of these components into modules that are part of the COMBO-400g1 Network Interface Connector firmware and analyzes their impact on FPGA's resource utilization and maximum frequency.
|
|
|
Implementation of Digital Circuit for High-Speed Network Communication in FPGA
Kondys, Daniel ; Cíbik, Peter (referee) ; Smékal, David (advisor)
Vysokorychlostní síťové karty často obsahují prvky pro hardwarovou akceleraci, která jim umožní efektivně zpracovávat data i při velmi vysokých rychlostech. Tato práce se zabývá tvorbou digitálního obvodu pro FPGA, který bude přenášet Ethernetové rámce rychlostí až 400 Gb/s. K tomu využívá bloky duševního vlastnictví pro Ethernet, které jsou součástí moderních FPGA čipů od firmy Intel. Jedná se o FPGA Stratix 10, které obsahuje bloky duševního vlastnictví typu E-tile, a Agilex, které obsahuje bloky duševního vlastnictví typu F-tile. Před vlastním návrhem se práce zabývá teoretickým rozborem standardu Ethernet a činnostmi jednotlivých podvrstev, popisuje vybrané FPGA čipy a zabývá se i NDK platformou, do níž bude vytvořený obvod zapojen. Praktická část spočívá v konfiguraci daných duševních bloků pro Ethernet a jejich integrací do vytvářeného obvodu. Nakonec jsou popsány metody pro ověření funkčnosti vytvořeného obvodu. Ty zahrnují verifikaci a testy na platformách s danými FPGA čipy. Výsledky ukazují, že vytvořený obvod je funkční a dosahuje rychlosti i 400 Gb/s. Jeho využití spočívá zejména v poskytnutí komunikace přes Ethernet pro digitální obvod, který bude dodáván jako součást firmwaru pro síťovou kartu XpressSX AGI-FH400G vyvinutou sdružením CESNET z.s.p.o a společností REFLEX CES.
|
|
|
Apparatus for electromagnetic levitation
Kondys, David ; Vorel, Pavel (referee) ; Martiš, Jan (advisor)
This paper deals with magnetic levitation. It is divided into two main chapters. At the beginning of the first chapter, it discusses the types of magnetic levitation and describes their use in practice. It then focuses on the MAGLEV high-speed trains that use magnetic levitation. The second chapter is about the practical fabrication of equipment to demonstrate magnetic levitation. In the beginning, it discusses possible designs of magnetic levitation and evaluates this. Next, it simulates the chosen design and produces a graph from the simulations describing the force required to pick up a preselected object. It also discusses possible distance sensors that may be useful for this design. Finally, it describes the practical fabrication of the device design, i.e., the fabrication of the solenoid coil and the solenoid holder. Finally, it evaluates the measured values when the device is started.
|
|
|
FPGA Digital Circuit for up to 400 Gbps Transfers over Ethernet
Kondys, D. ; Smékal, D.
Network cards with a hardware acceleration feature are a popular solution for meeting the ever-increasing demands for throughput in high-speed networks. Utilizing the FPGA (Field Programmable Gate Array) chips as the hardware acceleration elements, this paper presents a generic and highly modular digital circuit for FPGA that manages the transfer of data in form of Ethernet frames at rates reaching up to 400 Gbps. To achieve this, the proposed digital circuit takes advantage of the Ethernet intellectual property (IP) blocks in high-end FPGAs from Intel. By first implementing and fine-tuning it for data rates up to 100 Gbps, the next step is expanding it to reach data rates up to 400 Gbps. The created digital circuit will then be used in the FPGA design for the XpressSX AGI-FH400G network card (among others) created by companies CESNET a.l.e and REFLEX CES. Even though the target data rate is 400 Gbps, this paper focuses on the first step, which is the utilization of the Intel Ethernet hard IP blocks to reach 100 Gbps.
|
|
|
Electromagnetic levitation
Kondys, David ; Červinka, Dalibor (referee) ; Martiš, Jan (advisor)
The thesis deals with the issue of magnetic levitation. It is divided into two main chapters. The first chapter is focused on a general introduction to magnetic levitation. It describes the types of magnetic levitation, their use and the principle of execution. The end of the chapter is focused on a more detailed description of magnetically levitated MAGLEV trains. It describes the history of these trains, their use and construction. The second chapter is focused on the design of a device for demonstrating magnetic levitation. First, it deals with the simulation of an electromagnetic problem in the FEMM program. In addition, for the selected position configuration of the electromagnet and levitating magnet, it describes the design of the construction of the device in SOLIDWORKS and its manufacture. The result of the work is an attempt to make such a device that can stably keep the levitating magnet in the air.
|
|
|
Implementation of Digital Circuit for High-Speed Network Communication in FPGA
Kondys, Daniel ; Cíbik, Peter (referee) ; Smékal, David (advisor)
Vysokorychlostní síťové karty často obsahují prvky pro hardwarovou akceleraci, která jim umožní efektivně zpracovávat data i při velmi vysokých rychlostech. Tato práce se zabývá tvorbou digitálního obvodu pro FPGA, který bude přenášet Ethernetové rámce rychlostí až 400 Gb/s. K tomu využívá bloky duševního vlastnictví pro Ethernet, které jsou součástí moderních FPGA čipů od firmy Intel. Jedná se o FPGA Stratix 10, které obsahuje bloky duševního vlastnictví typu E-tile, a Agilex, které obsahuje bloky duševního vlastnictví typu F-tile. Před vlastním návrhem se práce zabývá teoretickým rozborem standardu Ethernet a činnostmi jednotlivých podvrstev, popisuje vybrané FPGA čipy a zabývá se i NDK platformou, do níž bude vytvořený obvod zapojen. Praktická část spočívá v konfiguraci daných duševních bloků pro Ethernet a jejich integrací do vytvářeného obvodu. Nakonec jsou popsány metody pro ověření funkčnosti vytvořeného obvodu. Ty zahrnují verifikaci a testy na platformách s danými FPGA čipy. Výsledky ukazují, že vytvořený obvod je funkční a dosahuje rychlosti i 400 Gb/s. Jeho využití spočívá zejména v poskytnutí komunikace přes Ethernet pro digitální obvod, který bude dodáván jako součást firmwaru pro síťovou kartu XpressSX AGI-FH400G vyvinutou sdružením CESNET z.s.p.o a společností REFLEX CES.
|
|
|
Applied use of DSP blocks in Intel FPGA
Kondys, Daniel ; Pokorný, Jiří (referee) ; Smékal, David (advisor)
This bachelor's thesis explores the utilization of DSP blocks located particularly on FPGA Stratix 10 DX 2800 for the implementation of a counter and a comparator. In the theoretical part, topics such as the protocol Ethernet, the FPGA technology and its relation with Network Interface Controllers are explained, followed by a~description of general design flow for digital circuits on FPGAs and a detailed insight on DSP blocks in the Virtex UltraScale+ XCVU7P and Stratix 10 DX 2800 FPGAs. The practical part focuses on the design, implementation and testing of the counter and comparator, followed by measurements of their impact on FPGA's resource utilization and maximum frequency. Lastly, it describes the integration of these components into modules that are part of the COMBO-400g1 Network Interface Connector firmware and analyzes their impact on FPGA's resource utilization and maximum frequency.
|
guest ::
RSS feed.