National Repository of Grey Literature 63 records found  beginprevious31 - 40nextend  jump to record: Search took 0.01 seconds. 
Advanced Techniques of C-to-HDL Tranformations
Michalik, Martin ; Křoustek, Jakub (referee) ; Přikryl, Zdeněk (advisor)
This thesis deals with proposal and implementation of advanced transformations used du- ring generation HDL from behavior description written in C language, which is part of architecture specification in CodAL language. These transformations focus either on the reduction of time required for execution, increasing frequency or area reduction of target hardware. This thesis discusses main problems of C to HDL transformation and describes principles and analysis of proposed transformations. Transformations results are discussed based on the visualisation of control data flow and register transfer level graphs, simulation of generated VHDL source files in the ModelSim software and synthesis of these source files for target FPGA Vertix 5 in the Xilinx ISE software.
CodAL Language Editor in Eclipse Framework
Hynek, Jiří ; Dolíhal, Luděk (referee) ; Přikryl, Zdeněk (advisor)
The Master thesis is focused on creation of an editor of CodAL language for the development toolkit of the project Lissom which is based on Eclipse framework. The goal of this thesis is to analyze the problem of editor creation and the features in existing editors which add some value to their usability. The outline of parser creation and subsequent code analysis of the source codes written into the editor is described in the theoretical part. It also explains the syntax and semantic aspects of the CodAL language. In the practical part the new CodAL language editor is designed and developed. The new CodAL language editor integrated into the development toolkit of the project Lissom is the final outcome of this thesis.
Usage of a DWARF Format in Debugger for Generic Microprocessor Simulators
Janečka, Pavel ; Přikryl, Zdeněk (referee) ; Hruška, Tomáš (advisor)
This paper gives basic introduction to source-level debugging, DWARF debugging information format and it is possible applications. Further it presents the Lissom project to the reader. The goal of this paper was also to draw on gained knowledge in order to extend Lissom's debugger.
Compilation of C++ Applications for Embedded Devices
Nosterský, Milan ; Přikryl, Zdeněk (referee) ; Hruška, Tomáš (advisor)
This master's thesis deals with the integrations of C++ programming language and its standard C++11 into the compiler for embedded systems. This compiler is based on LLVM project and it is generated from Codasip Studio. Codasip Studio is tool for design of the aplication specific processor cores, it is also allows generate compiler, which is based on the description of semantics section in processor's instruction set for any target processor architecture. C++ is programming language based on the C, which is extended by object oriented design and many other features. C++ language allows writing of very effective code on high level of abstraction. Funcionality of implementation is tested on testsuite in last phase of master's thesis.
Creep Behaviour of High-Density Polyethylene (HDPE)
Patzelt, Petr ; Přikryl, Zdeněk (referee) ; Petrůj, Jaroslav (advisor)
The theoretical part of the thesis deals with the summary of material properties and testing parameters that influence SCG process. The experimental part is aimed on the comparison of different condition effects on the process of FNCT and PENT. Chosen temperatures for PENT were 70; 80 and 90 °C and the applied nominal stress 2,0; 2,4 and 2,8 MPa. In the case of FNCT the chosen temperatures were the same and the ligamental stress was 4 MPa for all used environments which were: water, Arkopal N110 solution and Dehyton PL solution. In addition, several experiments were measuered under applied nominal stresses 3; 4; 5; 6; 8 a 10 MPa and at 80 °C in Arkopal N110 solution. The morphology of crack surfaces was studied afterwards. The obtained data were used for evaluaion by a five parameter equation.
Transformation of a Processor Description in CodAL to SystemC Structures
Ondruš, Tomáš ; Hynek, Jiří (referee) ; Přikryl, Zdeněk (advisor)
The goal of this thesis is to create a generator of simulators and hardware representation of application specific processors in a SystemC language. An aim of the first part is to create a wrapper layer compatible with SystemC TLM 2.0 that wraps an existing simulator to avail modeling of transaction oriented systems. The second part is a generator of a hardware representation for the processor that is suitable not only for logical synthesis, but also for the simulation on a cycle accurate level. A final result is a state of the art solution comparable to existing generators.
Static Analysis of CodAL Language Source Code
Fajčík, Martin ; Přikryl, Zdeněk (referee) ; Hynek, Jiří (advisor)
The goal of bachelor's thesis is to design and implement extensions devoted to source code static analysis and automatic corrections used in CodAL language editors. This form of analysis is convenient e.g. for the source code semantic checks. The thesis consists of theoretical and practical part. Role of the theoretical part is to overview with extension development related to Eclipse platform, especially with the CodAL language editor, CodAL language itself and to define problems of this language which are suitable to be solved on the static analysis level. Practical part includes specific implementation details of the particular static analysis elements and automatic corrections. These extended CodAL language editors are available in integrated development environment Codasip Studio based first and foremost on the Eclipse platform and project CDT. Codasip Studio has been developed by company Codasip Ltd. in collaboration with Lissom research team.
Emulation of Memory Subsystems in Multiprocessor Environment
Rajčok, Andrej ; Husár, Adam (referee) ; Přikryl, Zdeněk (advisor)
This study cover problem of design of emulation platform for multiprocesors systems. This study discuss problem of multiprocessor communication, it discuss different kind of communication systems for multiprocesor communication and protocols for data coherency. One of the solutions is picked, and the design is made and implemented into integrated design enviroment. In the end, study analyze created emulation system with focus on performance and memory load.
Emulator of Simple Processor
Kuzník, Petr ; Přikryl, Zdeněk (referee) ; Křoustek, Jakub (advisor)
Emulator will be designed as generic emulator. It should be capable of emulating versatile architectures. Each architecture will be stored in separate module implemented as dynamically linked dll libraries. Main goal is for the emulator to be generic and design its structure in a way, so that it would be possible to easily add new architecture modules and design these modules with already implemented abstractions. Primarily implemented architecture will be Commodore 64. It is a personal computer used mainly in USA during 1980s.
Generator of Instruction Set Manual
Křen, Michal ; Přikryl, Zdeněk (referee) ; Hruška, Tomáš (advisor)
This bachelor thesis describes the design and implementation of a generator of instruction set manual, that is a part of the Lissom project. Model of microprocessor is described using architecture and instruction set description language ISAC with added special marked comments to each one declaration. From this source of data useful information and relationships between them are selected for manual. The source of data for generating of instructions is the intermediate-language for generator of C language compiler. The output generated manual document is saved as RTF file and it contains two parts. First part includes summary of all microprocessor's resources and second part contains the list of all instructions.

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