National Repository of Grey Literature 5 records found  Search took 0.01 seconds. 
A Digital Network-on-chip Architecture Model for Diagnostics
Valachovič, Marek ; Bohrn, Marek (referee) ; Šťáva, Martin (advisor)
Due to increasing integration on the chip, bus structure for on-chip comunication is less and less advantageous. For this reason, Network on Chip (NoC) was created as a solution to this problém. In this work, the basic blocks of the NoC architecture are described. The model of this architecture called Nonfire is described in detail, both function blocks, from which the router is created, and the network Interface Connecting this router with the Processing Element.
Delayering of semiconductor chips
Valachovič, Marek ; Adámek, Martin (referee) ; Búran, Martin (advisor)
This work describes the individual layers of whitch the semiconductor chip is composed, the types of packages in witch it can be encapsulated and the methods of connecting the chip with the package. Furthermore, the methods of dacapsulating the encapsulated chip and delayering using several different methods, such as mechanical, chemical, plasmatic, or using an focused ion beam, are describe here. The methods of mechanical and chemical delayering of the layers of the semiconductor chip togeaher with dalayering by focused ion beam with the help of gas are practically performed and recorded.
On The Efficiency Of Precise Fault Localization And Identification In No
Valachovič, Marek
The paper joins the Bonfire NoC model, desrcibed in VHDL, together with a method of the precise localization and identification of faults in NoC and sums up a few findings about the efficiency of fault-tolerant NoC employing the method. A special focus is given to the area overhead and the mean time between failures in the presence of no or one permanent fault and some transient faults.
A Digital Network-on-chip Architecture Model for Diagnostics
Valachovič, Marek ; Bohrn, Marek (referee) ; Šťáva, Martin (advisor)
Due to increasing integration on the chip, bus structure for on-chip comunication is less and less advantageous. For this reason, Network on Chip (NoC) was created as a solution to this problém. In this work, the basic blocks of the NoC architecture are described. The model of this architecture called Nonfire is described in detail, both function blocks, from which the router is created, and the network Interface Connecting this router with the Processing Element.

Interested in being notified about new results for this query?
Subscribe to the RSS feed.