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Longest Prefix Match Search
Chrastina, Ondřej ; Puš, Viktor (referee) ; Tobola, Jiří (advisor)
This thesis deals with the problem of an efective routing and a data clasification in computer networks, in particular searching for the longest prefix match for the internet protocol of version 6. First the algorithm, Binary Trie, Level Compressed Trie, Lulea Compressed Trie and Binary Search on Intervals, are described and then tested to find the the most suitable algorithm from the viewpoint of memory requirements and the speed of the searching.
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Network Anomaly Detection
Pšorn, Daniel ; Puš, Viktor (referee) ; Kořenek, Jan (advisor)
This master thesis deals with detecting anomalies methods in network traffic. First of all this thesis analyzes the basic concepts of anomaly detection and already using technology. Next, there are also described in more detail three methods for anomalies search and some types of anomalies. In the second part of this thesis there is described implementation of all three methods and there are presented the results of experimentation using real data.
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Adapting the NetCOPE Platform for the NetFPGA Card
Koranda, Karel ; Puš, Viktor (referee) ; Korček, Pavol (advisor)
This thesis deals with adapting the NetCOPE platform for rapid development of hardware-accelerated network aplications for the NetFPGA-10G card. Its general purpose is to introduce target technology of FPGA chips and describe differences between the families of COMBOv2 and NetFPGA cards. The goals of this thesis are to design, implement and document the necessary adjustments of the NetCOPE platform, as well as testing of target hardware device with already ported platform and evaluation of options for inserting the core application.
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Graphical Demonstration of Selected Route Lookup Algorithm
Ohrádka, Marek ; Kaštil, Jan (referee) ; Puš, Viktor (advisor)
This bachelor's thesis deals with IP routing and different routing protocols. It describes different solutions of the longest prefix matching, advantages and disadvantages of different approaches. Shows the concept of the trie data structure and its alternatives. Describes the Shape Shifting Trie data structure in detail, as well as process of its creation and the way of traversing the nodes in SST route lookup algorithm. At last, application design and implementation is described. Main purpose of the application is to graphically demonstrate the function of SST route lookup algorithm. This thesis shows decomposition approach to this task, describes major problems and its solution.
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Memory Reduction of Stateful Network Traffic Processing
Hlaváček, Martin ; Puš, Viktor (referee) ; Kořenek, Jan (advisor)
This master thesis deals with the problems of memory reduction in the stateful network traffic processing. Its goal is to explore new possibilities of memory reduction during network processing. As an introduction this thesis provides motivation and reasons for need to search new method for the memory reduction. In the following part there are theoretical analyses of NetFlow technology and two basic methods which can in principle reduce memory demands of stateful processing. Later on, there is described the design and implementation of solution which contains the application of these two methods to NetFlow architecture. The final part of this work summarizes the main properties of this solution during interaction with real data.
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Network Applications Acceleration
Štourač, Jan ; Korček, Pavol (referee) ; Puš, Viktor (advisor)
There has been developed family of cards called COMBO under the auspices of the CESNET association. These cards carry programmable field array and their purpose is intended into accelerating of net traffic. There is also a platform called NetCOPE which is based on these cards and it's purpose is to accelerate and simplify the development of network applications. This thesis contains a detailed analysis of data throughput through a whole platform and describes some possible improvements which should reflect in a better performance of the whole platform.
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Verification of FPGA Generic Interconnection System
Bartoš, Václav ; Martínek, Tomáš (referee) ; Puš, Viktor (advisor)
This thesis deals with design, implementation and realization of simulation verification of generic interconnection system for FPGA chips. This system is part of the NetCOPE platform developed in the Liberouter project, within which was this work done. In the beginning, an usual methods of verification in SystemVerilog language are described. Then there is a brief description of the interconnection system, aimed especially to aspects important to verification. The main part of the thesis is design of verification environment and control program of test for all three components of the tested system. It started form the earlier described principles, that are established in the Liberouter project, and it add some more features. All components of the verification environment are designed to be general and reusable, so they can be used also in other verifications related to the interconnection system. At the end of the thesis, there are discussed results of the verification, found bugs and the general advantages of simulation verifications.
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Longest Prefix Match Algorithms
Sedlář, František ; Puš, Viktor (referee) ; Tobola, Jiří (advisor)
This bachelor's thesis deals with a description of basic longest prefix match (LPM) algorithms. Another algorithm - LC Trie - was added to existing implementations into the Netbench library. All the algorithms which the library includes were tested with real groups of IPv6 prefixes. They were compared on the basis of previously obtained data. Testing scripts for each of the algorithms were implemented as well as scripts for downloading groups of prefixes from significant sources on the internet.
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Packet Classification Algorithms
Machala, Jiří ; Puš, Viktor (referee) ; Kajan, Michal (advisor)
The main aim of this work is interpretation and implementation of HyperCuts algorithm. It also covers the problematic of packet classification in general - it sums up the basic classification theory and introduces well-known classification methods. It concentrates mostly on evaluation of HyperCuts in comparison to HiCuts algorithm and analyses the assets of optimizations described in professional literature. It proposes a new way to limit the number of memory accesses by combining HyperCuts and HiCuts for single classifier.
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