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Universal Emulation Platform for Checking the Designs of the Integrated Circuits
Podzemný, Jakub ; Kledrowetz, Vilém (referee) ; Prokop, Roman (advisor)
This work deals with verification possibilities of integrated circuits, especially with hardware emulation. The first part of the text briefly describes designing process of an integrated circuit, which includes emulation using emulation platforms. The main part of this work deals with the innovation of the emulation platform, which is used by SCG Czech Design Center s. r. o. Possible ways to improve the current emulation platform are explored and further taken into account when designing a universal emulation platform. Last part of this work deals with functional verification of the proposed universal emulation platform. Functionality will be verified by emulation of the basic control functions of the NCP1246 circuit.
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Modern methods of mixed-signal integrated circuit verification
Podzemný, Jakub ; Bohrn, Marek (referee) ; Fujcik, Lukáš (advisor)
This work aims at methods, which are suitable for mixed-signal integrated circuit verification. The emphasis is on the Assertion-based verification. In practice there are two languages, which can be used for this method - PSL and SystemVerilog. These languages are compared between each other and individually tested to find their capabilities, functional limits and restrictions. One of them will be integrated into verification flow of SCG Czech Design Center s. r. o. company to develop ABV methodology in analog and mixed-signal domain.
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Modern methods of mixed-signal integrated circuit verification
Podzemný, Jakub ; Bohrn, Marek (referee) ; Fujcik, Lukáš (advisor)
This work aims at methods, which are suitable for mixed-signal integrated circuit verification. The emphasis is on the Assertion-based verification. In practice there are two languages, which can be used for this method - PSL and SystemVerilog. These languages are compared between each other and individually tested to find their capabilities, functional limits and restrictions. One of them will be integrated into verification flow of SCG Czech Design Center s. r. o. company to develop ABV methodology in analog and mixed-signal domain.
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Universal Emulation Platform for Checking the Designs of the Integrated Circuits
Podzemný, Jakub ; Kledrowetz, Vilém (referee) ; Prokop, Roman (advisor)
This work deals with verification possibilities of integrated circuits, especially with hardware emulation. The first part of the text briefly describes designing process of an integrated circuit, which includes emulation using emulation platforms. The main part of this work deals with the innovation of the emulation platform, which is used by SCG Czech Design Center s. r. o. Possible ways to improve the current emulation platform are explored and further taken into account when designing a universal emulation platform. Last part of this work deals with functional verification of the proposed universal emulation platform. Functionality will be verified by emulation of the basic control functions of the NCP1246 circuit.
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I2C-Based Interfaces and Their Implementation Possibilities in Current ASIC Technologies
Podzemný, Jakub ; Ambrož, Jaromír (referee) ; Fujcik, Lukáš (advisor)
This work deals with implementation possibilities of I2C, SMBus and PMBus interfaces in current ASIC technologies. In first part of this work are descriptions of these interfaces considering their actual specifications and differences between them from digital and functional point of view. The analog part of this issue is for the most part ignored. Additional part is focused on comparison of selected Verilog HDL I2C/SMBus slave modules developed by ON Semiconductor company by size, function and mainly by optimization and extension possibilities. Last part of this work deals with newly designed I2C-based interfaces. New I2C slave, SMBus and PMBus slave modules are described in Verilog HDL language.
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