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Memory-Card Reader
Rumplík, Michal ; Mikušek, Petr (referee) ; Strnadel, Josef (advisor)
This work deals with problems of SD memory card reader and its working principles. I have focused in my bachelor's thesis on proposition and construction of memory-card reader. This memory-card reader is able to store and read ASCII signs. The hardware was proposed for serial interface communication and it is geared by microcontroller MC9S08QG8.
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Implementation of Generic Processor in FPGA
Mikušek, Petr ; Kořenek, Jan (referee) ; Martínek, Tomáš (advisor)
This thesis studies processor architectures suitable for embedded processors. This includes Transport Triggered Architectures (TTA). TTA is programmed by specifying data transport; operations are triggered as a side effect of data transports. In traditional Operation Triggered Architectures (OTA) requested operations are determined by program. Data transports are handled internally by hardware so it's impossible to control and optimize data transfer by compiler. This approach brings an advantage of hardware and software aspects. The aim of this thesis is to design and implement a sample TTA processor in VHDL followed by realization in FPGA. This processor is designed in a generic manner, i.e. customized by set of generic parameters such as data width, number of buses, etc.
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Gravity Accelerometer Based Applications
Horník, Jakub ; Mikušek, Petr (referee) ; Strnadel, Josef (advisor)
Bachelor's thesis deals with the practical use of accelerometer. The goal of this work was to select a few typical applications based on accelerometer and to implement it. Accelerometer was available on the Freescale development kit MC1321x. The resulting application is implemented in C++ with wxWidgets library for creating GUI.
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Memory-Card Reader
Rumplík, Michal ; Mikušek, Petr (referee) ; Strnadel, Josef (advisor)
This work deals with problems of SD memory card reader and its working principles. I have focused in my bachelor's thesis on proposition and construction of memory-card reader. This memory-card reader is able to store and read ASCII signs. The hardware was proposed for serial interface communication and it is geared by microcontroller MC9S08QG8.
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Gravity Accelerometer Based Applications
Horník, Jakub ; Mikušek, Petr (referee) ; Strnadel, Josef (advisor)
Bachelor's thesis deals with the practical use of accelerometer. The goal of this work was to select a few typical applications based on accelerometer and to implement it. Accelerometer was available on the Freescale development kit MC1321x. The resulting application is implemented in C++ with wxWidgets library for creating GUI.
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Implementation of Generic Processor in FPGA
Mikušek, Petr ; Kořenek, Jan (referee) ; Martínek, Tomáš (advisor)
This thesis studies processor architectures suitable for embedded processors. This includes Transport Triggered Architectures (TTA). TTA is programmed by specifying data transport; operations are triggered as a side effect of data transports. In traditional Operation Triggered Architectures (OTA) requested operations are determined by program. Data transports are handled internally by hardware so it's impossible to control and optimize data transfer by compiler. This approach brings an advantage of hardware and software aspects. The aim of this thesis is to design and implement a sample TTA processor in VHDL followed by realization in FPGA. This processor is designed in a generic manner, i.e. customized by set of generic parameters such as data width, number of buses, etc.
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Hardware Packet Preprocessing for Acceleration of Network Applications
Vondruška, Lukáš ; Mikušek, Petr (referee) ; Tobola, Jiří (advisor)
This thesis particularly deals with design and implementation of FPGA unit, which performs hardware acclerated header field extraction of network packets. By utilizing NetCOPE platform it is proposed flexible and effective high-peformance solution for high-speed networks. A theoretical part presents a classical protocol model and an analysis of the Internet traffic. Main part of the thesis is further focused on key issues in hardware packet preprocessing, such as packet classification and deep packet inspection. The author of this thesis also discusses possible technology platforms, which can be utilized to acceleration of network applications.
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