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National Repository of Grey Literature 4 records found  Search took 0.01 seconds. 
Modelling and simulation of analog circuits in FPGA
 Kotulič, Dominik ; Fujcik, Lukáš (referee) ; Dvořák, Vojtěch (advisor)
Bachelor thesis is focused on seeking a suitable calculation algorithm of an exponential function which could be suitably implemented in ASIC and FPGA circuits. The first part of the thesis is aimed at brief clarifying of the issue of transients in accumulation circuits and their modelling in the program PSpice. The second part deals with seeking ways of model proposals of the exponential function appropriate for the implementation in ASIC and FPGA circuits. Subsequently, in the final part of the thesis we designed and tested two calculation algorithms of the model of the exponential function that are implemented for floating point numbers.
Detailed record
Harmonic generator for simulation of analog circuits models
 Tománek, Jakub ; Pristach, Marián (referee) ; Dvořák, Vojtěch (advisor)
The purpose of this paper is to explore the posibilities of genarating harmonic signal on a ASIC and FPGA chip with emphasis on simulation of analog circuits. In theoretical section the algoritms suited best for this purpose are expained. In practical section these algorithms are realized and a conclusion is drawn based on required properties of signal.
Detailed record
Harmonic generator for simulation of analog circuits models
 Tománek, Jakub ; Pristach, Marián (referee) ; Dvořák, Vojtěch (advisor)
The purpose of this paper is to explore the posibilities of genarating harmonic signal on a ASIC and FPGA chip with emphasis on simulation of analog circuits. In theoretical section the algoritms suited best for this purpose are expained. In practical section these algorithms are realized and a conclusion is drawn based on required properties of signal.
Detailed record
Modelling and simulation of analog circuits in FPGA
 Kotulič, Dominik ; Fujcik, Lukáš (referee) ; Dvořák, Vojtěch (advisor)
Bachelor thesis is focused on seeking a suitable calculation algorithm of an exponential function which could be suitably implemented in ASIC and FPGA circuits. The first part of the thesis is aimed at brief clarifying of the issue of transients in accumulation circuits and their modelling in the program PSpice. The second part deals with seeking ways of model proposals of the exponential function appropriate for the implementation in ASIC and FPGA circuits. Subsequently, in the final part of the thesis we designed and tested two calculation algorithms of the model of the exponential function that are implemented for floating point numbers.
Detailed record

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