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Implementation of 8-bit microprocessor into FPGA chip
Walletzký, Ondřej ; Dvořák, Vojtěch (referee) ; Bohrn, Marek (advisor)
This thesis deals with design of microprocessor compatible with one of 8-bit microcontrollers manufactured by Microchip company. Theoretical part of this thesis analyzes architectures of 8-bit PIC microcontrollers, picks one of these microcontrollers and describes its architecture and function of its subcircuits. Practical part deals with design of architecture compatible in terms of instruction execution, internal data flow and subcircuit behavior, all this to achieve the best possible program portability from target microcontroller. The last part of thesis describes method of processor implementation into FPGA chip and mentions potential design differences for ASIC implementation. It also deals with verification and method of programming.
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FPGA Implementation of RMAP Initiator and Target
Walletzký, Ondřej ; Fujcik, Lukáš (referee) ; Dvořák, Vojtěch (advisor)
The thesis deals with design and implementation of controllers for the RMAP protocol, which is used by SpaceWire network endpoints to access memory contents of another endpoint. The theoretical research introduces concepts of the SpaceWire network, then describes the RMAP protocol and the AMBA AHB bus interface in detail. The practical part of this thesis then uses this information to design and implement controllers for the RMAP protocol. It first defines an architecture of these controllers, then describes design of individual blocks based on this architecture. As a next step, the thesis describes methods used to verify designed controllers and to test these controllers in an FPGA chip. Finally, an analysis of maximum frequency and usage of FPGA resources is done based on estimates provided by the synthesis tool.
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Remote Memory Access Protocol Controller For Spacewire Network
Walletzký, Ondřej
This article describes design and implementation of Remote Memory Access Protocol controller, namely the initiator module specified in the ECSS-E-ST-50-52C standard. It provides general description of its architecture and describes some of its subcomponents. Finally, it summarizes resource utilization and maximum theoretical clock frequency for different configurations when synthesized for Spartan-3 FPGA chip.
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FPGA Implementation of RMAP Initiator and Target
Walletzký, Ondřej ; Fujcik, Lukáš (referee) ; Dvořák, Vojtěch (advisor)
The thesis deals with design and implementation of controllers for the RMAP protocol, which is used by SpaceWire network endpoints to access memory contents of another endpoint. The theoretical research introduces concepts of the SpaceWire network, then describes the RMAP protocol and the AMBA AHB bus interface in detail. The practical part of this thesis then uses this information to design and implement controllers for the RMAP protocol. It first defines an architecture of these controllers, then describes design of individual blocks based on this architecture. As a next step, the thesis describes methods used to verify designed controllers and to test these controllers in an FPGA chip. Finally, an analysis of maximum frequency and usage of FPGA resources is done based on estimates provided by the synthesis tool.
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|
|
Implementation of 8-bit microprocessor into FPGA chip
Walletzký, Ondřej ; Dvořák, Vojtěch (referee) ; Bohrn, Marek (advisor)
This thesis deals with design of microprocessor compatible with one of 8-bit microcontrollers manufactured by Microchip company. Theoretical part of this thesis analyzes architectures of 8-bit PIC microcontrollers, picks one of these microcontrollers and describes its architecture and function of its subcircuits. Practical part deals with design of architecture compatible in terms of instruction execution, internal data flow and subcircuit behavior, all this to achieve the best possible program portability from target microcontroller. The last part of thesis describes method of processor implementation into FPGA chip and mentions potential design differences for ASIC implementation. It also deals with verification and method of programming.
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