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Design of a Sigma Delta AD converter for sensor applications
Pěček, Lukáš ; Prokop, Roman (referee) ; Kledrowetz, Vilém (advisor)
This diploma thesis deals with the design of a sigma delta AD converter for a sensor application of junction temperature measurement in the automotive environment. A modified continuous time current mode modulator structure was designed. Its advantage lies in shifting and extending an input voltage range to work with signals from 0 V to 1,2 with a high impedance input and a relatively low hardware complexity. The functionality was verified by a behavioral model in the Simulink environment and then by transistor level simulation in CADENCE environment using ONC18/I4T technology.
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Parking solution in Uherský Ostroh in the streets of Rybář, Svobodova, Dlouhá
Pěček, Lukáš ; Kučera, Pavel (referee) ; Smělý, Martin (advisor)
The theme of this bachelor’s thesis is the processing of the design documentation for the solution of the static transport in the built-up area of the town Uherský Ostroh, in the streets Rybáře, Svobodova, Dlouhá. The main reason for the solution is the shortage of parking places in the current conditions. The part of the documentation includes the solution of cycling transport at the cycle route „Moravská stezka, Uherskohradišťská“, with the route number 47, and overall traffic soothing on the road transport in the solving streets.
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Terminal Uhersky Ostroh
Pěček, Lukáš ; Petřík, Vlastimil (referee) ; Smělý, Martin (advisor)
The subject of this diploma thesis is the design of a pre-station area near the railway station Uherský Ostroh on track 340: Brno - Veselí nad Moravou and its connection to existing roads. The work alternatively addresses the method of connecting the area to the road I/55 in the build-up area of the town, the arrangement of parking and bus stops. Part of the design is also the connection of the area for the needs of pedestrians and suggests places for parking bicycles.
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Terminal Uhersky Ostroh
Pěček, Lukáš ; Petřík, Vlastimil (referee) ; Smělý, Martin (advisor)
The subject of this diploma thesis is the design of a pre-station area near the railway station Uherský Ostroh on track 340: Brno - Veselí nad Moravou and its connection to existing roads. The work alternatively addresses the method of connecting the area to the road I/55 in the build-up area of the town, the arrangement of parking and bus stops. Part of the design is also the connection of the area for the needs of pedestrians and suggests places for parking bicycles.
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Design Of A Sigma Delta Ad Converter For Sensor Applications
Pěček, Lukáš
This paper presents the design of an AD converter for a sensor application of junction temperature measurement in the demanding automotive environment. A modified continuous time current mode first order single bit ΣΔ modulator structure was designed in ONC18/I4T technology. Its advantage lies in shifting and extending an input voltage range to work with signals from 0 V to 1.2 V with a high impedance input, low hardware complexity and low power consumption.
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Parking solution in Uherský Ostroh in the streets of Rybář, Svobodova, Dlouhá
Pěček, Lukáš ; Kučera, Pavel (referee) ; Smělý, Martin (advisor)
The theme of this bachelor’s thesis is the processing of the design documentation for the solution of the static transport in the built-up area of the town Uherský Ostroh, in the streets Rybáře, Svobodova, Dlouhá. The main reason for the solution is the shortage of parking places in the current conditions. The part of the documentation includes the solution of cycling transport at the cycle route „Moravská stezka, Uherskohradišťská“, with the route number 47, and overall traffic soothing on the road transport in the solving streets.
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Design of a Sigma Delta AD converter for sensor applications
Pěček, Lukáš ; Prokop, Roman (referee) ; Kledrowetz, Vilém (advisor)
This diploma thesis deals with the design of a sigma delta AD converter for a sensor application of junction temperature measurement in the automotive environment. A modified continuous time current mode modulator structure was designed. Its advantage lies in shifting and extending an input voltage range to work with signals from 0 V to 1,2 with a high impedance input and a relatively low hardware complexity. The functionality was verified by a behavioral model in the Simulink environment and then by transistor level simulation in CADENCE environment using ONC18/I4T technology.
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