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Network Applications Acceleration
Štourač, Jan ; Korček, Pavol (referee) ; Puš, Viktor (advisor)
There has been developed family of cards called COMBO under the auspices of the CESNET association. These cards carry programmable field array and their purpose is intended into accelerating of net traffic. There is also a platform called NetCOPE which is based on these cards and it's purpose is to accelerate and simplify the development of network applications. This thesis contains a detailed analysis of data throughput through a whole platform and describes some possible improvements which should reflect in a better performance of the whole platform.
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Verification of FPGA Generic Interconnection System
Bartoš, Václav ; Martínek, Tomáš (referee) ; Puš, Viktor (advisor)
This thesis deals with design, implementation and realization of simulation verification of generic interconnection system for FPGA chips. This system is part of the NetCOPE platform developed in the Liberouter project, within which was this work done. In the beginning, an usual methods of verification in SystemVerilog language are described. Then there is a brief description of the interconnection system, aimed especially to aspects important to verification. The main part of the thesis is design of verification environment and control program of test for all three components of the tested system. It started form the earlier described principles, that are established in the Liberouter project, and it add some more features. All components of the verification environment are designed to be general and reusable, so they can be used also in other verifications related to the interconnection system. At the end of the thesis, there are discussed results of the verification, found bugs and the general advantages of simulation verifications.
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PCI Express Bridge
Korček, Pavol ; Kořenek, Jan (referee) ; Martínek, Tomáš (advisor)
The aim of this thesis was to design and implement PCI Express Bridge. The main purpose of this unit is to help application engineers who develop various FPGA based accelerators. The implemented unit transforms complex PCI Express based system bus interface to more common and scalable interface of internal bus for on-chip components interconnection. This allows engineers to focus on the development of their target applications, not on a complicated communication protocol. The unit was implemented in the VHDL language, synthesized for Virtex-5 based FPGAs as well as completely tested on ML555 and COMBOv2 cards. The acquired results show that the component reaches the throughput of 7 Gb/s, which is the theoretical limitation of underlying protocols.
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Network Applications Acceleration
Štourač, Jan ; Korček, Pavol (referee) ; Puš, Viktor (advisor)
There has been developed family of cards called COMBO under the auspices of the CESNET association. These cards carry programmable field array and their purpose is intended into accelerating of net traffic. There is also a platform called NetCOPE which is based on these cards and it's purpose is to accelerate and simplify the development of network applications. This thesis contains a detailed analysis of data throughput through a whole platform and describes some possible improvements which should reflect in a better performance of the whole platform.
|
|
|
Verification of FPGA Generic Interconnection System
Bartoš, Václav ; Martínek, Tomáš (referee) ; Puš, Viktor (advisor)
This thesis deals with design, implementation and realization of simulation verification of generic interconnection system for FPGA chips. This system is part of the NetCOPE platform developed in the Liberouter project, within which was this work done. In the beginning, an usual methods of verification in SystemVerilog language are described. Then there is a brief description of the interconnection system, aimed especially to aspects important to verification. The main part of the thesis is design of verification environment and control program of test for all three components of the tested system. It started form the earlier described principles, that are established in the Liberouter project, and it add some more features. All components of the verification environment are designed to be general and reusable, so they can be used also in other verifications related to the interconnection system. At the end of the thesis, there are discussed results of the verification, found bugs and the general advantages of simulation verifications.
|
|
|
PCI Express Bridge
Korček, Pavol ; Kořenek, Jan (referee) ; Martínek, Tomáš (advisor)
The aim of this thesis was to design and implement PCI Express Bridge. The main purpose of this unit is to help application engineers who develop various FPGA based accelerators. The implemented unit transforms complex PCI Express based system bus interface to more common and scalable interface of internal bus for on-chip components interconnection. This allows engineers to focus on the development of their target applications, not on a complicated communication protocol. The unit was implemented in the VHDL language, synthesized for Virtex-5 based FPGAs as well as completely tested on ML555 and COMBOv2 cards. The acquired results show that the component reaches the throughput of 7 Gb/s, which is the theoretical limitation of underlying protocols.
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