National Repository of Grey Literature 2 records found  Search took 0.01 seconds. 
Packet Parsing and Header Field Extraction in FPGA
Selecký, Roman ; Košař, Vlastimil (referee) ; Kořenek, Jan (advisor)
Network devices need to process packets and gather information from header fields. Packet parsers become outdated due to increasing number of protocols and frequent changes in their definitions. This thesis aims to create design of flexible and powerful packet parser. P4 language was designed to define packet processing. Flexible parsers can be constructed by combining potential of P4 with reconfigurable FPGA technology. Program mapping P4 language to designed architecture was implemented in order to promptly reflect changes in parser model.
Packet Parsing and Header Field Extraction in FPGA
Selecký, Roman ; Košař, Vlastimil (referee) ; Kořenek, Jan (advisor)
Network devices need to process packets and gather information from header fields. Packet parsers become outdated due to increasing number of protocols and frequent changes in their definitions. This thesis aims to create design of flexible and powerful packet parser. P4 language was designed to define packet processing. Flexible parsers can be constructed by combining potential of P4 with reconfigurable FPGA technology. Program mapping P4 language to designed architecture was implemented in order to promptly reflect changes in parser model.

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