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Simulation of cryptographic algorithms using FPGA
Németh, František ; Mašek, Jan (referee) ; Smékal, David (advisor)
Bachelor thesis is dealing with a cipher standard AES and with a design of encryption and decryption components for AES in special modes of operation. Programming language is VHDL. In theoretical part of thesis is a further descriptions of AES and behaviour of block cipher operation modes. Furthermore the brief description of VHDL, FPGA and NetCOPE framework is a piece of theoretical part as well. The practical part contains designs which are made in developing environment Vivado from Xilinx. Programmed modes of operation are ECB, CBC, CTR and CFB. Simulation outputs and synthesis results are summerized in tables.
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Software support for cryptography education
Stančík, Peter ; Vyoral, Josef (referee) ; Burda, Karel (advisor)
The main aim of this thesis was to study, choose and decribe techniques eligible for cryptography education. A pedagogically appropriate presentation for the selected techniques' principles was to be chosen. Another goal was to create an integrated modular web interface containing a calculator focused on cryptographic operations. The eligibility of techniques was assessed accordingly to the computing processes implied by these techniques and also accordingly to the ability of being presented in an illustrative way. A program simplifying calculations used in symetric and asymetric cryptography was designed and implemented. It disposes of a web interface and one of its parts is focused on steganographic techniques. On the other hand, any pedagogically appropriate presentation interconnecting this program with theoretical findings from this field was not found.
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Simulation of cryptographic algorithms using FPGA
Németh, František ; Mašek, Jan (referee) ; Smékal, David (advisor)
Bachelor thesis is dealing with a cipher standard AES and with a design of encryption and decryption components for AES in special modes of operation. Programming language is VHDL. In theoretical part of thesis is a further descriptions of AES and behaviour of block cipher operation modes. Furthermore the brief description of VHDL, FPGA and NetCOPE framework is a piece of theoretical part as well. The practical part contains designs which are made in developing environment Vivado from Xilinx. Programmed modes of operation are ECB, CBC, CTR and CFB. Simulation outputs and synthesis results are summerized in tables.
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Software support for cryptography education
Stančík, Peter ; Vyoral, Josef (referee) ; Burda, Karel (advisor)
The main aim of this thesis was to study, choose and decribe techniques eligible for cryptography education. A pedagogically appropriate presentation for the selected techniques' principles was to be chosen. Another goal was to create an integrated modular web interface containing a calculator focused on cryptographic operations. The eligibility of techniques was assessed accordingly to the computing processes implied by these techniques and also accordingly to the ability of being presented in an illustrative way. A program simplifying calculations used in symetric and asymetric cryptography was designed and implemented. It disposes of a web interface and one of its parts is focused on steganographic techniques. On the other hand, any pedagogically appropriate presentation interconnecting this program with theoretical findings from this field was not found.
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