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Autonegotiation implementation for 25 - 100 Gbps Ethernet interfaces
Válek, Vladislav ; Jedlička, Petr (referee) ; Tomašov, Adrián (advisor)
This bachelor's thesis addresses the design of the auto-negotiation component for network interface cards controlled by FPGAs. Auto-negotiation function allows to advertise the available communication parameters, like the link speed, the transmission pause ability or Forward Error Correction (FEC) ability, by either side of the common link and determine the common abilities, which will be used to establish a connection. In the beginning, the internal parts of Xilinx UltraScale+ FPGA family are introduced with greater emphasis on the description of GTY transceivers. In the next chapter are introduced the mechanisms of auto-negotiation function as described in clause 73 of the IEEE 802.3-2018 standard. The design here is created for Ethernet interfaces running at speed 25~Gbps and is written in VHDL language. The next chapter describes the necessary steps which are required for the implementation on the FPGAs, where high-speed transceivers are in use. Function of the created design was then checked within a simulation and the correspondent results are also provided in this thesis. In the end, the testing of the designed auto-negotiation component took place for which the network card with Vitex 7 UltraScale+ FPGA was used. The testing process includes the use of the Integrated Logic Analyzer (ILA) which was inserted into final design. The achieved results from testing of both, the auto-negotiation process and surrounding physical layer processes, are described here with proper commentary.
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OFDM implementation in FPGA
Horák, Martin ; Fedra, Zbyněk (referee) ; Maršálek, Roman (advisor)
The thesis is focused on designing OFDM modem, which should be implemented into the FPGA device. The advantages of using OFDM signals in order to provide high baud rates together with high multipath immunity has provoked a mass expansion into media systems such as DSL, DVB, Wi-Fi, WLAN, etc. . Thanks to this technology we can quarantee high modulation rates with minimal negative disturbance eects. The rst part is dedicated to characterise OFDM signals, their generation and the algorithm producing the OFDM which is implemented in DSP devices. For the purpose of using the fastest algorithm, the Fast Fourier Transform using Cooley-Tukey algorithm was shown. Before we can implement OFDM modem into the FPGA device, we have to simulate its correct function. Because there is no OFDM analyser available at our departement, its necessary to prove its correct function by simulations. Therefore a large part of this thesis is focused on simulations using Matlab and ModelSim, in order to show comparison between the theoretical, and simulated results. Between the theoretical and practical simulations there is a part which shows the brief characteristics of available FPGA devices. Detailed view is presented just for the Virtex II device, which the implementation is made for. As a suitable FPGA device, we have chosen Virtex II XC2V1000 which is available for students. In the last part the measured results were shown to prove the corect function of the modem. Programming the FPGA using VHDL language is realized in the software ISE Xilinx (distributed in Xilinx software support). All programmed scrits and data used in this thesis are included on distributed media.
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Autonegotiation implementation for 25 - 100 Gbps Ethernet interfaces
Válek, Vladislav ; Jedlička, Petr (referee) ; Tomašov, Adrián (advisor)
This bachelor's thesis addresses the design of the auto-negotiation component for network interface cards controlled by FPGAs. Auto-negotiation function allows to advertise the available communication parameters, like the link speed, the transmission pause ability or Forward Error Correction (FEC) ability, by either side of the common link and determine the common abilities, which will be used to establish a connection. In the beginning, the internal parts of Xilinx UltraScale+ FPGA family are introduced with greater emphasis on the description of GTY transceivers. In the next chapter are introduced the mechanisms of auto-negotiation function as described in clause 73 of the IEEE 802.3-2018 standard. The design here is created for Ethernet interfaces running at speed 25~Gbps and is written in VHDL language. The next chapter describes the necessary steps which are required for the implementation on the FPGAs, where high-speed transceivers are in use. Function of the created design was then checked within a simulation and the correspondent results are also provided in this thesis. In the end, the testing of the designed auto-negotiation component took place for which the network card with Vitex 7 UltraScale+ FPGA was used. The testing process includes the use of the Integrated Logic Analyzer (ILA) which was inserted into final design. The achieved results from testing of both, the auto-negotiation process and surrounding physical layer processes, are described here with proper commentary.
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OFDM implementation in FPGA
Horák, Martin ; Fedra, Zbyněk (referee) ; Maršálek, Roman (advisor)
The thesis is focused on designing OFDM modem, which should be implemented into the FPGA device. The advantages of using OFDM signals in order to provide high baud rates together with high multipath immunity has provoked a mass expansion into media systems such as DSL, DVB, Wi-Fi, WLAN, etc. . Thanks to this technology we can quarantee high modulation rates with minimal negative disturbance eects. The rst part is dedicated to characterise OFDM signals, their generation and the algorithm producing the OFDM which is implemented in DSP devices. For the purpose of using the fastest algorithm, the Fast Fourier Transform using Cooley-Tukey algorithm was shown. Before we can implement OFDM modem into the FPGA device, we have to simulate its correct function. Because there is no OFDM analyser available at our departement, its necessary to prove its correct function by simulations. Therefore a large part of this thesis is focused on simulations using Matlab and ModelSim, in order to show comparison between the theoretical, and simulated results. Between the theoretical and practical simulations there is a part which shows the brief characteristics of available FPGA devices. Detailed view is presented just for the Virtex II device, which the implementation is made for. As a suitable FPGA device, we have chosen Virtex II XC2V1000 which is available for students. In the last part the measured results were shown to prove the corect function of the modem. Programming the FPGA using VHDL language is realized in the software ISE Xilinx (distributed in Xilinx software support). All programmed scrits and data used in this thesis are included on distributed media.
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