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National Repository of Grey Literature 2 records found  Search took 0.00 seconds. 
Models of transistors of CMOS 0.35 um process for PSpice
 Veverka, Vojtěch ; Dvořák, Radek (referee) ; Šotner, Roman (advisor)
The master’s thesis focuses on model designing of active components for PSpice simulator. Creation of models are based on text description, which is avaible in Cadence Spectre libraries. The aim of this thesis is approximate conversion of CMOS and bipolar tranzistors based on I3T 0.35 m technology. Simulation’s results and their comparation are discussed below.
Detailed record
Models of transistors of CMOS 0.35 um process for PSpice
 Veverka, Vojtěch ; Dvořák, Radek (referee) ; Šotner, Roman (advisor)
The master’s thesis focuses on model designing of active components for PSpice simulator. Creation of models are based on text description, which is avaible in Cadence Spectre libraries. The aim of this thesis is approximate conversion of CMOS and bipolar tranzistors based on I3T 0.35 m technology. Simulation’s results and their comparation are discussed below.
Detailed record

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