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National Repository of Grey Literature 2 records found  Search took 0.01 seconds. 
Hardware Acceleration of Encryption Algorithms Using Xilinx Zynq Technology
 Linner, Marek ; Fukač, Tomáš (referee) ; Kořenek, Jan (advisor)
The main concern of this paper are two world standard encryption algorithms Data Encryption Standard DES (DES for short) and Advanced Encryption Standard (further mentioned as AES). For these two respective algorithms, three publicly available implementations are integrated into a benchmarking code in C programming language. The code has been executed, implementations measured with three different input block lengths and bitrate calculated for each implementation. The thesis also includes hardware implementation of both encryption algorithms DES and AES using VHDL language, simulation of the synthesised circuits and calculation of the hardware implementations' bitrate using Vivado simulator's timing reports. These measured bitrates are then compared with the bitrates of benchmarked software implementations. Paper includes all source codes of the benchmarking C program and VHDL implementation, along with program written in C# used to generate VHDL components and another C# program used for automated testing. 
Detailed record
Hardware Acceleration of Encryption Algorithms Using Xilinx Zynq Technology
 Linner, Marek ; Fukač, Tomáš (referee) ; Kořenek, Jan (advisor)
The main concern of this paper are two world standard encryption algorithms Data Encryption Standard DES (DES for short) and Advanced Encryption Standard (further mentioned as AES). For these two respective algorithms, three publicly available implementations are integrated into a benchmarking code in C programming language. The code has been executed, implementations measured with three different input block lengths and bitrate calculated for each implementation. The thesis also includes hardware implementation of both encryption algorithms DES and AES using VHDL language, simulation of the synthesised circuits and calculation of the hardware implementations' bitrate using Vivado simulator's timing reports. These measured bitrates are then compared with the bitrates of benchmarked software implementations. Paper includes all source codes of the benchmarking C program and VHDL implementation, along with program written in C# used to generate VHDL components and another C# program used for automated testing. 
Detailed record

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