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	Time Synchronization in Computer Networks Matoušek, Denis ; Kořenek, Jan (referee) ; Martínek, Tomáš (advisor) The master's thesis deals with design of a solution for time synchronization in computer networks that is a crucial problem of many network applications. Based on analysis of protocols for time synchronization, PTP protocol was chosen as an appropriate candidate. The thesis describes the implementation of the design for a special network interface card and demonstrates features of the solution in several tests. A part of the solution processing precise timestamps was implemented in FPGA chip on the network card while PTP messages are processed in a software application. Values of configurable parameters of the application were determined based on analysis of the network card properties and results of particular tests. It was achieved accuracy in order of tens of nanoseconds. Detailed record
	HW/SW Codesign for the Xilinx Zynq Platform Viktorin, Jan ; Košař, Vlastimil (referee) ; Korček, Pavol (advisor) This work describes a novel approach of HW/SW codesign on the Xilinx Zynq and similar platforms. It deals with interconnections between the Processing System (ARM Cortex-A9 MPCore) and the Programmable Logic (FPGA) to find an abstract and universal way to develop applications that are partially offloaded into the programmable hardware and that run in the Linux operating system. For that purpose a framework for HW/SW codesign on the Zynq and similar platforms is designed. No such framework is currently available. Detailed record
	Time Synchronization in Computer Networks Matoušek, Denis ; Kořenek, Jan (referee) ; Martínek, Tomáš (advisor) The master's thesis deals with design of a solution for time synchronization in computer networks that is a crucial problem of many network applications. Based on analysis of protocols for time synchronization, PTP protocol was chosen as an appropriate candidate. The thesis describes the implementation of the design for a special network interface card and demonstrates features of the solution in several tests. A part of the solution processing precise timestamps was implemented in FPGA chip on the network card while PTP messages are processed in a software application. Values of configurable parameters of the application were determined based on analysis of the network card properties and results of particular tests. It was achieved accuracy in order of tens of nanoseconds. Detailed record

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