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Dynamic Reconfiguration of Hardware Accelerators
Brabec, Lukáš ; Přikryl, Zdeněk (referee) ; Masařík, Karel (advisor)
Thesis deals with usage of dynamic reconfiguration of FPGA in area of application specific instruction-set processors, considerng time-to-market, possibilities of acceleration and universality. Furthermore, it is designed an extension of application specific processor Codix with reconfigurable unit and it is described its implementation. Finally, the results are evaluated and opportunities for further development are identified.
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Dynamic reconfiguration with Atmel FPSLIC
Jančík, Martin ; Hanák, Pavel (referee) ; Fedra, Zbyněk (advisor)
This study describes the platform Atmel FPSLIC, which is created by means of the logic arrays FPGA and the micro-sequencer controller AVR. The developmental kit STK594 is described here as well, with its programming possibilities, as for the logic arrays FPGA, as for the micro-sequencers AVR. Also the separate circuit AT94K is described there. This circuit can be programmed by the language VHDL (the field FPGA), or by means of the assembler and language C for the micro-sequencer. All this can be integrated into the one output file by means of program System Designer, comprising a set of software tools for given programming languages and for generation of the whole circuit. Furthermore, the study describes a simple application for the both platform parts. Also the description of the dynamic reconfiguration of the circuit gate part is included.
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Dynamic Reconfiguration of Hardware Accelerators
Brabec, Lukáš ; Přikryl, Zdeněk (referee) ; Masařík, Karel (advisor)
Thesis deals with usage of dynamic reconfiguration of FPGA in area of application specific instruction-set processors, considerng time-to-market, possibilities of acceleration and universality. Furthermore, it is designed an extension of application specific processor Codix with reconfigurable unit and it is described its implementation. Finally, the results are evaluated and opportunities for further development are identified.
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|
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Dynamic reconfiguration with Atmel FPSLIC
Jančík, Martin ; Hanák, Pavel (referee) ; Fedra, Zbyněk (advisor)
This study describes the platform Atmel FPSLIC, which is created by means of the logic arrays FPGA and the micro-sequencer controller AVR. The developmental kit STK594 is described here as well, with its programming possibilities, as for the logic arrays FPGA, as for the micro-sequencers AVR. Also the separate circuit AT94K is described there. This circuit can be programmed by the language VHDL (the field FPGA), or by means of the assembler and language C for the micro-sequencer. All this can be integrated into the one output file by means of program System Designer, comprising a set of software tools for given programming languages and for generation of the whole circuit. Furthermore, the study describes a simple application for the both platform parts. Also the description of the dynamic reconfiguration of the circuit gate part is included.
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